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54AC11112J 데이터시트

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54AC11112J DUAL J-K NEGATIVE-EDGE-TRIGGERED ELIP-FLOPS WITH CLEAR AND PRESET TI
Texas Instruments TI
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description
These devices contain two independent J-K negative-edge-triggered flip-flops.

• Flow-Through Architecture Optimizes PCB Layout
• Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise
• EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process
• 500-mA Typical Latch-Up Immunity at 125°C
• ESD Protection Exceeds 2000 V, MIL STD-883C Method 3015
• Package Options Include Plastic SmallOutline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs

 

54AC11112J 관련 기타 제조 업체 검색

부품명상세내역PDF제조사
ACT112M DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 보기 Texas Instruments
CD54AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 보기 Texas Instruments
HD74LS114 Dual J-K Negative-edge-triggered Flip-Flops (with Preset, Common Clear and Common Clock) 보기 Renesas Electronics
HD74LS114 Dual J-K Negative-edge-triggered Flip-Flops(with Preset, Common Clear and Common Clock) 보기 Hitachi -> Renesas Electronics
HD74LS109 Dual J-K Positive-edge-triggered Flip-Flops(with Preset and Clear) 보기 Hitachi -> Renesas Electronics
HD74HCT74A Dual D–type Positive Edge–triggered Flip Flops with Clear and Preset 보기 Hitachi -> Renesas Electronics
HD74LS107AP Dual J-K Negative-edge-triggered Flip-Flops(with Clear) 보기 Hitachi -> Renesas Electronics
HD74LS74 Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear) 보기 Hitachi -> Renesas Electronics
CD74AC109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 보기 Texas Instruments
DM7474 Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs 보기 Fairchild Semiconductor

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