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WED9LC6816V 데이터시트

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WED9LC6816V
WEDC
White Electronic Designs Corporation WEDC
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DESCRIPTION
The WED9LC6816V is a 3.3V, 256K x 32 Synchronous Pipeline SRAM and a 4Mx32 Synchronous DRAM array constructed with one 256K x 32 SBSRAM and two 4Mx16 SDRAM die mounted on a multilayer laminate substrate. The device is packaged in a 153 lead, 14mm x 22mm, BGA.

FEATURES
■ Clock speeds:
    ■ SSRAM: 200, 166,150, and 133 MHz
    ■ SDRAMs: 125 and 100 MHz
■ DSP Memory Solution
    ■ Texas Instruments TMS320C6201
    ■ Texas Instruments TMS320C6701
■ Packaging:
    ■ 153 pin BGA, JEDEC MO 163
■ 3.3V Operating supply voltage
■ Direct control interface to both the SSRAM and SDRAM ports on the “C6x”
■ Common address and databus
■ 65% space savings vs. monolithic solution
■ Reduced system inductance and capacitance

 

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제조사
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