1 Semiconductor
Power Down @ CAS Latency = 4, Burst Length = 4
MR27V3266D
CLK
012
345
6 7 8 9 10 11 12 13 14 15 16 17 18 19
CKE
tCC
tCH tCL
Power Down ( Note1 )
tSI
tPDE
Active Standby
CS
Read Operation
RAS
CAS
ADDR
Ca
DQ
a0 a1 a2 a3
MR
Read
Power Down
Entry
Power Down
Exit
Note
1. Minimum current consumption is expected in Power Down state.
Row Active
Low level CKE sampled only in Active Standby state is defined as Power Down "Entry" command and it cuts
current consumption into minimum level.
After Power Down "Exit" the contents of Mode Register and row address is preserved.
During Power Down state no command can be sampled.
August , 1999
Revision 2.4
32M Synchronous OTP
21