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CY7C1359A-100AC 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY7C1359A-100AC
256K x 18 Synchronous-Pipelined Cache Tag RAM
Cypress Semiconductor
CY7C1359A-100AC Datasheet PDF : 24 Pages
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CY7C1359A/GVT71256T18
TAP AC Switching Characteristics
Over the Operating Range
[18, 19]
Parameter
Description
Clock
t
THTH
f
TF
t
THTL
t
TLTH
Output Times
Clock Cycle Time
Clock Frequency
Clock HIGH Time
Clock LOW Time
t
TLQX
t
TLQV
t
DVTH
t
THDX
Set-up Times
TCK LOW to TDO Unknown
TCK LOW to TDO Valid
TDI Valid to TCK HIGH
TCK HIGH to TDI Invalid
t
MVTH
t
CS
Hold Times
TMS Set-up
Capture Set-up
t
THMX
TMS Hold
t
CH
Capture Hold
Notes:
18. t
CS
and t
CH
refer to the set-up and hold time requirements of latching data from the boundary scan register.
19. Test conditions are specified using the load in TAP AC Test Conditions.
Min.
20
8
8
0
5
5
5
5
5
5
Max
50
10
Unit
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Document #: 38-05120 Rev. **
Page 11 of 24
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