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HD6433044F 데이터 시트보기 (PDF) - Hitachi -> Renesas Electronics
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HD6433044F
Hitachi Single-Chip Microcomputer
Hitachi -> Renesas Electronics
HD6433044F Datasheet PDF : 867 Pages
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1.2 Block Diagram
Figure 1-1 shows an internal block diagram.
MD
2
MD
1
MD
0
EXTAL
XTAL
ø
STBY
RES
V
PP
*
/RESO
NMI
P6
6
/LWR
P6
5
/HWR
P6
4
/RD
P6
3
/AS
P6
2
/BACK
P6
1
/BREQ
P6
0
/WAIT
P8
4
/CS
0
P8
3
/CS
1
/IRQ
3
P8
2
/CS
2
/IRQ
2
P8
1
/CS
3
/IRQ
1
P8
0
/RFSH/IRQ
0
Port 3
Address bus
Data bus (upper)
Data bus (lower)
Port 4
H8/300H CPU
Interrupt controller
ROM
(masked ROM,
PROM, or flash
memory)
RAM
16-bit integrated
timer unit
(ITU)
Programmable
timing pattern
controller (TPC)
DMA controller
(DMAC)
Refresh
controller
Watchdog timer
(WDT)
Serial communication
interface
(SCI)
×
2 channels
A/D converter
D/A converter
Port B
Port A
Port 7
P5
3
/A
19
P5
2
/A
18
P5
1
/A
17
P5
0
/A
16
P2
7
/A
15
P2
6
/A
14
P2
5
/A
13
P2
4
/A
12
P2
3
/A
11
P2
2
/A
10
P2
1
/A
9
P2
0
/A
8
P1
7
/A
7
P1
6
/A
6
P1
5
/A
5
P1
4
/A
4
P1
3
/A
3
P1
2
/A
2
P1
1
/A
1
P1
0
/A
0
P9
5
/SCK
1
/IRQ
5
P9
4
/SCK
0
/IRQ
4
P9
3
/RxD
1
P9
2
/RxD
0
P9
1
/TxD
1
P9
0
/TxD
0
Note:
*
V
PP
function is provided only for the flash memory version.
Figure 1-1 Block Diagram
5
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