UPD75048CW 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD75048CW

4-BIT SINGLE-CHIP MICROCOMPUTER

NEC => Renesas Technology 

13. PACKAGE DRAWINGS

64 PIN PLASTIC SHRINK DIP (750 mil)

64

µPD75048

33

1

32

A

K

L

F

D

NM

NOTE

1) Each lead centerline is located within 0.17 mm (0.007 inch) of

its true position (T.P.) at maximum material condition.

2) Item "K" to center of leads when formed parallel.

CB

M

R

ITEM MILLIMETERS INCHES

A

58.68 MAX. 2.311 MAX.

B

1.78 MAX. 0.070 MAX.

C

1.778 (T.P.) 0.070 (T.P.)

D

0.50±0.10

0.020+–00..000045

F

0.9 MIN.

0.035 MIN.

G

3.2±0.3

0.126±0.012

H

0.51 MIN.

0.020 MIN.

I

4.31 MAX. 0.170 MAX.

J

5.08 MAX. 0.200 MAX.

K

19.05 (T.P.) 0.750 (T.P.)

L

17.0

0.669

M

0.25

+0.10

–0.05

0.010+–00..000043

N

0.17

0.007

R

0~15°

0~15°

P64C-70-750A,C-1

61

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