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SELC2010M 데이터 시트보기 (PDF) - MagnaChip Semiconductor

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SELC2010M
Magnachip
MagnaChip Semiconductor Magnachip
SELC2010M Datasheet PDF : 15 Pages
First Prev 11 12 13 14 15
3. Select Pole and Zero
1
f PO =
2π *
CC
Y * GEA
GEA = Gm-Amp Transconductance
Y = Attenuation Ratio = VFPN
VO
f Z1
=
2π
1
* RC
* CC
Zero is set at the same location of output pole. In system design, if
ESR of output capacitor is large, Pole should be set at same
frequency in order to compensate The Zero of ESR.
f P1(OP)
=
2π
1
* RC
* COP
Preliminary – Subject to change without notice
OCT.15 2009. Version 0.3
MagnaChip Semiconductor Ltd.

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