P400 Series
Vishay High Power Products Passivated Assembled
Circuit Elements, 40 A
ON-STATE CONDUCTION
PARAMETER
SYMBOL
TEST CONDITIONS
Maximum DC output current
at case temperature
IO
Full bridge circuits
Maximum peak, one-cycle
non-repetitive on-state or
forward current
ITSM,
IFSM
Maximum I2t for fusing
I2t
Maximum I2√t for fusing
I2√t
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage drop
Maximum forward voltage drop
Maximum non-repetitive rate of rise of
turned-on current
Maximum holding current
Maximum latching current
VT(TO)1
VT(TO)2
rt1
rt2
VTM
VFM
dI/dt
IH
IL
t = 10 ms No voltage
t = 8.3 ms reapplied
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
100 % VRRM
reapplied
No voltage
reapplied
Sinusoidal half wave,
initial TJ = TJ maximum
t = 10 ms 100 % VRRM
t = 8.3 ms reapplied
t = 0.1 ms to 10 ms, no voltage reapplied
I2t for time tx = I2√t · √tx
(16.7 % x π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum
(I > π x IT(AV)), TJ = TJ maximum
(16.7 % x π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum
(I > π x IT(AV)), TJ = TJ maximum
ITM = π x IT(AV)
IFM = π x IF(AV)
TJ = 25 °C
TJ = 125 °C from 0.67 VDRM
ITM = π x IT(AV), Ig = 500 mA, tr < 0.5 μs, tp > 6 μs
TJ = 25 °C anode supply = 6 V, resistive load
VALUES
40
80
385
400
325
340
745
680
530
480
7450
0.83
1.03
9.61
7.01
1.4
200
130
250
UNITS
A
°C
A
A2s
A2√s
V
mΩ
V
A/μs
mA
BLOCKING
PARAMETER
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and off-state
leakage current at VRRM, VDRM
Maximum peak reverse leakage current
RMS isolation voltage
SYMBOL
TEST CONDITIONS
dV/dt
IRRM,
IDRM
IRRM
VISOL
TJ = 125 °C, exponential to 0.67 VDRM gate open
TJ = 125 °C, gate open circuit
TJ = 25 °C
50 Hz, circuit to base, all terminals shorted,
TJ = 25 °C, t = 1 s
VALUES
200
10
100
2500
UNITS
V/μs
mA
μA
V
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Document Number: 93755
Revision: 05-Nov-09