TDA8740H 데이터 시트보기 (PDF) - Philips Electronics

부품명

상세내역

제조사

TDA8740H

Satellite sound circuit with noise reduction

Philips Electronics 

Philips Semiconductors

Satellite sound circuit with noise reduction

Product specification

TDA8740; TDA8740H

SYMBOL

PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

Output selector control circuit (see also Table 2) and main channel PLL lock-in select [MCS pin 7 (2)]; pins 15,

17, 26 and 13 (10, 13, 22 and 8) are MOS inputs and should not be left open-circuit

VIL

LOW level input voltage limits

VIM

MID level input voltage limits

for MCS pin only

0

−

1.8 −

1.2 V

2.8 V

VIMF

MID level input voltage on

VP must be 10.8 to 13.2 V 17 19 21 %VP

MCS pin if MCS pin is floating

VIH

HIGH level input voltage limits

RIL

low input resistance MCS pin

to ground

3.5 −

VP V

12 19 26 kΩ

RIH

high input resistance MCS pin

to VP

52 80 108 kΩ

IIL

LOW level input current

VIL = 0 V

−

<−1 −

µA

(not MCS pin)

IIH

HIGH level input current

VIH = 5 V

−

<1 −

µA

(not MCS pin)

Notes

1. At pin 20 (16) the demodulated 1 kHz signal should be present with a typical level of 158 mV (RMS) (−16 dBV), and

THD of maximum 0.5%; VP = 8 to 13.2 V; Tamb = −20 to +70 °C.

2. Modulation of main channel is OFF; modulation of secondary channels is ON.

3. The electrolytic capacitors at pins 40 and 42 (36 and 38) are removed and 1500 pF capacitors between pin 40 (36)

and ground and between pin 42 (38) and ground are connected. At pins 40 and 42 (36 and 38) the demodulated

1 kHz signals should be present with typical levels of 7 mV (RMS) and THD of maximum 0.5%; VP = 8 to 13.2 V;

Tamb = −20 to +70 °C.

4. All PLLs locked; RS1 = RS2 = 220 kΩ.

5. Modulation of secondary channel being measured and main channel is OFF; modulation of other secondary channel

is ON.

6. Modulation of main channel is ON; modulation of secondary channels is OFF.

7. Measured at pins 38 (34) (left) and 30 (26) (right) and no electrolytic capacitors connected to these pins.

October 1994

13

Share Link: