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TEA1098AUH

Speech and handsfree IC

Philips Electronics 

Philips Semiconductors

Speech and handsfree IC

Product specification

TEA1098A

Loudspeaker amplifier (pins HFRX, GALS and LSAO)

The TEA1098A has an asymmetrical input for the

loudspeaker amplifier with an input resistance of 20 kΩ

between pins HFRX and GND. It is biased at two diodes

voltage. Without limitation from the output, the input stage

can accommodate signals up to 580 mV (RMS) at room

temperature for 2% of THD.

The gain of the input stage varies according to the mode

of the TEA1098A. In the receive mode, the gain is at its

maximum; in the transmit mode, it is at its minimum and in

the Idle mode, it is halfway between maximum and

minimum. Switch-over from one mode to the other is

smooth and click-free. The rail-to-rail output stage is

designed to power a loudspeaker connected as a

single-ended load (between pins LSAO and GND).

In the receive mode, the overall gain of the loudspeaker

amplifier can be adjusted from 0 dB up to 35 dB to suit

specific application requirements. The gain from HFRX to

LSAO is proportional to the value of RGALS and equals

28 dB with RGALS = 255 kΩ. A capacitor connected in

parallel with RGALS is recommended and provides a

first-order low-pass filter.

Digital volume control (pins LVCI and EVCI)

The loudspeaker amplifier gain can be adjusted

(attenuated) with the LVCI logic input (as MSB) and the

4-level input EVCI (as LSBs). This combination provides

8 steps of −3.85 dB which apply in all handsfree receive

modes. Maximum gain (27 dB) is obtained for LVCI = VDD

and EVCI = VDD; minimum gain (0 dB) is defined by

LVCI = 0 and EVCI = 0. In-between steps correspond to

the combination of LVCI with EVCI intermediary levels of

1⁄3VDD and 2⁄3VDD (see Fig.17). E.g. the first attenuation

step is given by LVCI = VDD and EVCI = 2⁄3VDD.

Dynamic limiter (pin DLC)

The dynamic limiter of the TEA1098A prevents clipping of

the loudspeaker output stage and protects the operation of

the circuit when the supply voltage at VBB falls below 2.7 V.

Hard clipping of the loudspeaker output stage is prevented

by rapidly reducing the gain when the output stage starts

to saturate. The time in which gain reduction is effected

(clipping attack time) is approximately a few milliseconds.

The circuit stays in the reduced gain mode until the peaks

of the loudspeaker signals no longer cause saturation. The

gain of the loudspeaker amplifier then returns to its normal

value within the clipping release time (typically 250 ms).

Both attack and release times are proportional to the value

of the capacitor CDLC. The total harmonic distortion of the

loudspeaker output stage, in reduced gain mode, stays

below 2% up to 10 dB (minimum) of input voltage

overdrive [providing VHFRX is below 580 mV (RMS)].

When the supply voltage drops below an internal threshold

voltage of 2.7 V, the gain of the loudspeaker amplifier is

rapidly reduced (approximately 1 ms). When the supply

voltage exceeds 2.7 V, the gain of the loudspeaker

amplifier is increased again. By forcing a level lower than

0.2 V on pin DLC, the loudspeaker amplifier is muted and

the TEA1098A is automatically forced into the transmit

mode.

DUPLEX CONTROLLER

Signal and noise envelope detectors (pins TSEN, TENV,

TNOI, RSEN, RENV and RNOI)

The signal envelopes are used to monitor the signal level

strength in both channels. The noise envelopes are used

to monitor background noise in both channels. The signal

and noise envelopes provide inputs for the decision logic.

The signal and noise envelope detectors are illustrated in

Fig.9.

For the transmit channel, the input signal at pin TXI is

40 dB amplified to TSEN. For the receive channel, the

input signal at pin HFRX is 0 dB amplified to RSEN. The

signals from TSEN and RSEN are logarithmically

compressed and buffered to TENV and RENV

respectively.

The sensitivity of the envelope detectors is set with RTSEN

and RRSEN. The capacitors connected in series with the

two resistors block any DC component and form a

first-order high-pass filter. In the basic application

(see Fig.17) it is assumed that VTXI = 1 mV (RMS) and

VHFRX = 100 mV (RMS) nominal and both RTSEN and

RRSEN have a value of 10 kΩ. With the value of CTSEN and

CRSEN at 100 nF, the cut-off frequency is at 160 Hz.

The buffer amplifiers feeding the compressed signals to

pins TENV and RENV have a maximum source current of

120 µA and a maximum sink current of 1 µA. Capacitors

CTENV and CRENV set the timing of the signal envelope

monitors. In the basic application, the value of both

capacitors is 470 nF. Because of the logarithmic

compression, each 6 dB signal increase means 18 mV

increase of the voltage on the envelopes TENV or RENV

at room temperature. Thus, timings can be expressed in

dB/ms. At room temperature, the 120 µA sourced current

corresponds to a maximum rise-slope of the signal

envelope of 85 dB/ms. This is sufficient to track normal

speech signals. The 1 µA current sunk by TENV or RENV

corresponds to a maximum fall-slope of 0.7 dB/ms. This is

sufficient for a smooth envelope and also eliminates the

effect of echoes on switching behaviour.

2000 Aug 18

13

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