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MIPSPR31500 데이터 시트보기 (PDF) - Philips Electronics

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MIPSPR31500
Philips
Philips Electronics Philips
MIPSPR31500 Datasheet PDF : 24 Pages
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Philips Semiconductors
Poseidon embedded processor
Preliminary specification
MIPS
PR31500
VIDEO
Tamb = 0 to +70°C, VDD = 3.3 ± 0.3V, External Capacitance = 40pF
ITEM
PARAMETER
RISING/FALLING
LIMITS
MIN
MAX
1
LOAD Pulse width
100
1600
2
Delay LOAD Falling to FRAME
100
3200
3
Delay LOAD Falling to DF
100
3200
4
Delay LOAD Falling to CP
100
3200
5
Delay CP Rising to VDAT[3:0]
3
6
VDAT to CP Rising Setup
15
25
7
VDAT to CP Rising Hold
15
25
NOTE:
Values shown assume a 40MHz clock for the CPU, MIN and MAX values are programmable using Video Control Registers.
VIDEO TIMING DIAGRAMS
2
FRAME
UNIT
ns
ns
ns
ns
ns
ns
ns
DF
3
LOAD
CP
1
4
VDAT[3:0]
5
Figure 12. Video Timing, 4 Bit Non-Split LCD
SN00179
CP
VDAT[3:0]
6
7
Figure 13. Video Data Timing, 4 Bit Split LCD and 8 Bit Non-Split LCD
SN00180
1996 Sep 24
21

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