Q-67107-H5236 데이터 시트보기 (PDF) - Micronas

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Q-67107-H5236

PRIMUS Powerful Scan Rate Converter including ultistandard Color Decoder

Micronas 

SDA 9402/02S(A31)

Preliminary Data Sheet 02.2001

System Description

5

System Description

All I²C bus registers mentioned are printed in bold and italics (e.g. YCDEL)

5.1

CVBS Frontend

The CVBS frontend consists of the color-decoding circuit itself, a sync processing circuit

for generation of H/V signals out of the CVBS signal, and the luminance processing. The

main task of the luminance processing is to remove the color carrier by means of a notch

filter. For PAL and SECAM operation a baseband delay line is used for U and V signals.

This can be used as comb filter in NTSC operation (only for chrominance). The RGB

input can either be used as an overlay for the CVBS channel (RGB+FBL) or as a full

master channel (RGB+H/V). The overlay is done by means of a soft-mix and can be used

e.g. for ’SCART’ connector. This block incorporates a matrix (for RGB signals) which is

switched off for YUV (e.g. YPbPr) input signals. A CBS (contrast, brightness, saturation)

control makes the input signal adjustable.

5.1.1 Source select

Figure 5-1 shows the analog frontend. The analog CVBS signal can be fed to the inputs

CVBS1...7 of SDA 9402 (amplitude 0.5...1.5Vpp). One signal is selected via CVBSEL1

and fed to first ADC. A second signal is selected via CVBSEL2 and fed to the other ADC.

CVBS4&5 or CVBS6&7 are intended to use as separate Y/C inputs (YCSEL). After

clamping to the back porch (switchable to sync-tip clamping by CLPSTGY) both signals

are AD-converted with an amplitude resolution of 9 bit. The conversion is done using a

20.25 MHz free-running stable crystal clock. Before this the signals are lowpassed by

antialias filter. Three inputs can be looped back to output CVBSO1-3 (CVBOSEL1,

CVBOSEL2, CVBSELO3). A signal addition is performed to output a CVBS signal even

when separate Y/C signals are used at input. Inputs that are not used are roughly

clamped to fit in the allowed voltage region. For stand-by operation (power-down mode),

A/D and D/A converter are switched off by STANDBY keeping the source-selector

operational.

Micronas

5-16

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