SP331ET-L/TR 데이터 시트보기 (PDF) - Signal Processing Technologies

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SP331ET-L/TR

Programmable Dual RS-232/RS-485Transceiver

Signal Processing Technologies 

VCC = +5V

+

C1 –

–5V

+5V

+

C2 –

–5V

C4

+ – VDD Storage Capacitor

– + VSS Storage Capacitor

C3

Figure 11. Charge Pump Phase 1.

VCC = +5V

C4

+

+

+ – VDD Storage Capacitor

C1 –

C2 –

– + VSS Storage Capacitor

–10V

C3

Figure 12. Charge Pump Phase 2.

VCC = +5V

+

C1 –

–5V

+5V

+

C2 –

–5V

C4

+ – VDD Storage Capacitor

– + VSS Storage Capacitor

C3

Figure 13. Charge Pump Phase 3.

VCC = +5V

+10V

C4

+

+

+ – VDD Storage Capacitor

C1 –

C2 –

– + VSS Storage Capacitor

C3

Figure 14. Charge Pump Phase 4.

simultaneously with this, the positive side of

capacitor C1 is switched to +5V and the negative

side is connected to ground, and the cycle begins

again.

Since both V+ and V– are separately generated

from VCC in a no–load condition, V+ and V– will

be symmetrical. Older charge pump approaches

that generate V– from V+ will show a decrease

in the magnitude of V– compared to V+ due to

the inherent inefficiencies in the design.

The clock rate for the charge pump typically

operates at 15kHz. The external capacitors must

be 0.1µF with a 16V breakdown rating.

External Power Supplies

For applications that do not require +5V only,

external supplies can be applied at the V+ and

V– pins. The value of the external supply volt-

ages must be no greater than ±l0V. The current

drain for the ±10V supplies is used for RS-232.

For the RS-232 driver the current requirement

will be 3.5mA per driver. The external power

supplies should provide a power supply se-

quence of :+l0V, then +5V, followed by –l0V.

+10V

a) C2+

GND

GND

b) C2-

-10V

Figure 15. Charge Pump Waveforms

Date: 03-04-05

Programmable Dual RS-232/RS-485 Transceiver

9

© Copyright 2005 Sipex Corporation

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