STV0299B 데이터 시트보기 (PDF) - STMicroelectronics
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STV0299B Datasheet PDF : 36 Pages
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4 FUNCTIONAL DESCRIPTION (continued)
Figure 4: Clock Signal Generation
STV0299B
LPF
VCO 1/4
VCO
ON/OFF
1/6
TO SERIAL
SHIFTER
Reg 01[7:6]
÷(K+1) OSC
Reg 01[4:0]
÷(M+1)
PHASE
COMPARATOR
Reg 02[2:0]
1
÷P(Note 1) 0
I2C
VCO ON/OFF
Note 2
DIRCLK-CTRL
Note 2
STDBY
(I2C bit)
DIRCLK (I2C bit)
XTAL OUT
XTAL IN/CLK-IN
M_CLK
STDBY
I2C
DIRCLK-DIS
1/16
PRESCALER
÷R 1/2
Reg 04
PROGRAMABLE
DIVIDER
DiSEqC/tone
burst modulator
1/0
Reg 08[2:0]
1/0
1/2
F22/
DiSEqCTM
AUX_CLK
Reg 03
Note: 1 Refer to the Register List P[2:0] in table 1
2 At the rising edge of RESET signal (pin 15) the corresponding bit of the I2C bus register is forced to the status of pin STDBY or
to DIRCLK-DIS.
Table 1: Divider Programming
K(1:0) in register
00
01
10
11
fREF = fXTAL divided by:
1
2
3
4
P(2:0) in register
000
001
010
011
fM_CLK = fVCO
divided by P:
4
6
8
12
M(4:0) in register
00000
00001
00010
fVCO = fREF
multiplied by:
4
8
12
100
16
101
24
110
32
111
48
Table 2: Summary of FM_CLK
00011
...
11111
16
fVCO
=
fXTAL
×
4
⋅
-M------+-----1--
K+1
...
128
f M_CLK
=
f---V---C---O--
P
DIRCLK_CTRL = 0
fM_CLK = fCLK_IN
DIRCLK_CTRL =1
fM_CLK = 0
STDBY = 1
9/36
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