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CD4011BCCW 데이터 시트보기 (PDF) - Fairchild Semiconductor
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CD4011BCCW
Quad 2-Input NOR Buffered B Series Gate • Quad 2-Input NAND Buffered B Series Gate
Fairchild Semiconductor
CD4011BCCW Datasheet PDF : 8 Pages
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Schematic Diagrams
CD4001BC
1
/
4
of device shown
J
=
A
+
B
Logical “1”
=
HIGH
Logical “0”
=
LOW
All inputs protected by standard
CMOS protection circuit.
CD4011BC
1
/
4
of device shown
J
=
A•B
Logical “1”
=
HIGH
Logical “0”
=
LOW
All inputs protected by standard
CMOS protection circuit.
www.fairchildsemi.com
2
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