APU0063QE-TY 데이터 시트보기 (PDF) - Anpec Electronics

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APU0063QE-TY

80CH DRIVER FOR DOT MATRIX LCD

Anpec Electronics 

APU0063 PRELIMINARY

PIN DESCRIPTION-QFP100

PIN(NO.)

VEE(31)

VDD(42)

VSS(36)

I N P U T ¡þ

OUTPUT

NAME

Power

Negative Supply

Voltage

Power

Operating Voltage

DESCRIPTION

For LCD driver circuit

(0 ≥ VEE ≥ VDD-10V)

For logic circuit

(+5V 10% ,+3V 10%)

Power

Operating Voltage 0V(GND)

V1 ~ V4(32 ~ 35)

M(48)

CL1(37)

CL2(43)

SHL1(38)

DL1, DR1

(44, 45)

Input

Input

Input

Input

Input

Input

Output

Bias Voltage

Bias Voltage level for LCD drive

Altemated Signal for

LCD Driver Output

This is the signal for LCD twisting

Data Latch Clock

The signal enable the latch, it is

negative senstive latched.

Data Shift Clock

The signal enable the shift

register, it is negative edge-trigger.

Shifting Direction

Control Signal of

Part1

Selection of the shift directon of

Part1 shift register

SHL1

VDD

VSS

DL1 DR1

Output Input

Input Output

Data Interface

Data input / output pf Part1 shift

register

SC1 ~ SC40

SHL2(39)

DL2, DR2

(46, 47)

Output

Input

Input

Output

LCD Driver

LCD driver output of Part1

Shifting Direction

Control Signal of

Part2

Data Interface

Selection of the shift directon of

Part2 shift register

SHL2

VDD

VSS

DL2 DR2

Output Input

Input Output

Data input / output pf Part2 shift

register

SC41 ~ SC80

Output

LCD Driver

LCD driver output of Part2

INTERFACE

Power Supply

Power Supply

Power Supply

Power Supply

Controller

Controller

Controller

Controller

Controller

or

APU0066

LCD

Controller

Controller

or

APU0066

LCD

NOTE : Input pin can not be floated,or it will cause large leakage current.

Copyright  ANPEC Electronics Corp.

4

Rev. A.07 - FEB., 2002

www.anpec.com.tw

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