IS42S16128 데이터 시트보기 (PDF) - Integrated Silicon Solution

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IS42S16128

128K Words x 16 Bits x 2 Banks (4-MBIT) SYNCHRONOUS DYNAMIC RAM

Integrated Silicon Solution 

IS42S16128

ISSI ®

Write Cycle / Precharge Termination

T0

T1

T2

T3

T4

T5

T6

T7

T8

T9

CLK

tCKS

CKE

tCS

CS

RAS

tCHI

tCK

tCL

tCKA

tCH

tCS

tCH

CAS

WE

A0-A7

A8

A9

DQM

tCS

tCH

tCS

tCH

tAS

tAH

ROW

tAS

tAH

ROW

tAS

tAH

BANK 0

COLUMN m

NO PRE

BANK 0

tCS

BANK 0 OR 1

BANK 0

tCH

tCS tCH

tDH

tDH

tDH

tDS

tDS

tDS

I/O

DIN 0m

DIN 0m+1

DIN 0m+2

tRCD

tRAS

tRC

<ACT 0>

CAS latency = 3, burst length = 4

<WRIT 0>

tRP

<PRE 0>

T10

T11 T12

ROW

ROW

BANK 1

BANK 0

tRCD

tRAS

tRP

<ACT >

Undefined

Don't Care

72

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. A

03/13/00

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