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HMS81C4324 데이터 시트보기 (PDF) - Hynix Semiconductor

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HMS81C4324 Datasheet PDF : 100 Pages
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HMS81C43xx / GMS87C4060
The operation within data memory (RAM)
ASL, BIT, DEC, INC, LSR, ROL, ROR
Example; Addressing accesses the address 0135H regard-
less of G-flag and DPGR.
F100: 983501 INC!0135H
;A ROM[135H]
135H
data
~~
0F100H
98
0F101H
35
0F102H
01
Ã
~~ À
data+1 data
þ
address: 0135
X indexed direct page, auto increment{X}+
In this mode, a address is specified within direct page by
the X register and the content of X is increased by 1.
LDA, STA
Example; G=0, X=35H
F100: DB
LDA
{X}+
35H
data
~~
0F100H
DB
À
~~
data A
þ 36H X
(5) Indexed Addressing
X indexed direct page (no offset) {X}
In this mode, a address is specified by the X register.
ADC, AND, CMP, EOR, LDA, OR, SBC, STA, XMA
Example; X=15H, G=1, DPGR=03H
E550: D4
LDA
{X};ACCRAM[X].
315H
data
~~
0E550H
D4
À
~~
þ
data A
X indexed direct page (8 bit offset) dp+X
This address value is the second byte (Operand) of com-
mand plus the data of -register. And it assigns the mem-
ory in Direct page.
ADC, AND, CMP, EOR, LDA, LDY, OR, SBC, STA
STY, XMA, ASL, DEC, INC, LSR, ROL, ROR
Example; G=0, X=0F5H
E550: C645
LDA
45H+X
3AH
data
~~
0E550H
C6
0E551H
45
~~
þ
Ã
À data A
45H+0F5H=13AH
November 2001 ver 1.2
27

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