LC74201JE 데이터 시트보기 (PDF) - SANYO -> Panasonic

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LC74201JE

Single Chip MPEG Decoder

SANYO -> Panasonic 

LC74201JE

Microcontroller Interface

The microcontroller interface offers a choice of parallel or serial operation. The configuration is determined by the input

levels at the AD4 to AD6 pins (pins 49 to 51) at the rising edge of the RESET pin (pin 38) input.

• Parallel interface setting conditions

[AD6, AD5, AD4] = [0, 1, 0]: Data read at rising edge of STB pin (pin 44) input.

[AD6, AD5, AD4] = [0, 1, 1]: Data read at falling edge of STB pin (pin 44) input.

[AD6, AD5, AD4] = [0, 0, 0]: Data read while STB pin (pin 44) input at high level.

• Serial interface setting conditions

[AD6, AD5, AD4] = [1, *, *]

Notes: 1. Do not use any mode specifications other than the above.

2. A reset (RESET = low) configures the AD0 to AD7 pins (pins 45 to 52) for input.

3. The serial input mode fixes the AD2 to AD7 pins in input mode. Always treat them as input pins (by

connecting them to either ground or DVDD1). If the interface is used for serial operation, the AD6 pin may be

fixed at high level without any problems.

4. The RESET pin (pin 38) includes a built-in pul-up resistor. Do not apply a voltage higher than DVDD1.

Timing Characteristics at Ta = +25°C, DVDD1 = 4.0 V

Parameter

Data setup time

Data hold time

Minimum reset pulse width

Symbol

Conditions

tSDI0

tHDI0

tWRST

AD6 to AD4 → RESET pin

AD6 to AD4 → RESET pin

RESET pin

Ratings

Unit

min

max

180

–

ns

180

–

ns

180

–

ns

No. 5761-14/21

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