VES1993 데이터 시트보기 (PDF) - Philips Electronics

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VES1993

Single Chip Satellite Channel Receiver

Philips Electronics 

Philips Semiconductors

Single Chip Satellite Channel Receiver

Product specification

VES1993

Symbol

SCL_0

SDA_0

TO[7:0]

INT

22K_0

XINDIV

PWMO

IDDQ

GND

VDD

VCC

Pin Number

28

29

53,55,59,62,

66,69,75,77

79

82

26

25

30

1,13,24,34,

47,50,63,70,

83,93,95

2,14,23,35,

48,49,61,71,

81,94,98

22, 91

Type

O

5V

I/O

5V

O

3.3V

O

5V

O

5V

O

5V

O

5V

I

I

Description

This output is equivalent to the SCL input, but can be tristated by I2C

programmation. A pull-up resistor (typically 22KΩ) must be connected

between this pin and VCC.

This signal is equivalent to the SDA I/O of the VES 1993 but can be

tristated by I2C programmation. SDA_0 is bidirectionnal. A pull-up

resistor (typically 22KΩ) must be connected between this pin and VCC.

TO[7:0] is a dedicated Test output bus used to test the VES 1993. In

normal mode of operation, these 8 outputs are set to 0.*

INTerrupt line output. This active low output interrupt line can be

configured by the I2C interface. INT is an open drain output and

therefore requires an external pull-up resistor to either VDD or VCC.

This output pin provides the 22KHz used to control the antena LNB. This

output is controlled via the I2C interface.

This clock output pin is a division of the crystal frequency by a factor

programmable from 1 to 15 through the I2C interface (index 39).

This output pin is a programmable PWM signal. It can be used as an

analog control signal, which value can be programmed through the I2C

interface (index 38). The maximum frequency on VAGC output is

SACLK / 8.

Test input pin. Must be grounded.

Digital ground voltage.

I Digital 3.3V supply voltage.

I Digital 5V supply voltage.

1999 Jan 01

10

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