ADM8691 데이터 시트보기 (PDF) - Analog Devices

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ADM8691

Microprocessor Supervisory Circuits

Analog Devices 

Data Sheet

APPLICATIONS INFORMATION

INCREASING THE DRIVE CURRENT

If the continuous output current requirements at VOUT exceed

100 mA, or if a lower VCC − VOUT voltage differential is desired,

an external PNP pass transistor can be connected in parallel

with the internal transistor. The BATT ON output (ADM8691/

ADM8695) can directly drive the base of the external transistor.

5V INPUT

POWER

0.1µF

PNP TRANSISTOR

0.1µF

BATTERY

VCC BATT

ON

VOUT

VBATT

ADM8691/

ADM8695

Figure 24. Increasing the Drive Current

USING A RECHARGEABLE BATTERY FOR BACKUP

If a capacitor or a rechargeable battery is used for backup, the

charging resistor should be connected to VOUT to eliminate the

discharge path that would exist during power-down if the

resistor were connected to VCC.

5V INPUT

POWER

0.1µF

I = VOUT – VBATT

R

R

0.1µF

VCC

VOUT

RECHARGEABLE

BATTERY

VBATT

Figure 25. Rechargeable Battery

ADDING HYSTERESIS TO THE POWER-FAIL

COMPARATOR

For increased noise immunity, hysteresis can be added to

the power-fail comparator. Because the comparator circuit is

noninverting, hysteresis can be added simply by connecting a

resistor between the PFO output and the PFI input, as shown in

Figure 26. When PFO is low, Resistor R3 sinks current from the

summing junction at the PFI pin. When PFO is high, the series

combination of R3 and R4 sources current into the PFI summing

junction. This results in differing trip levels for the comparator.

ADM8690/ADM8691/ADM8695

7V TO 15V

INPUT

POWER

R1

5V

7805

VCC

1.3V

PFI

PFO

R2

R3

R4

TO

MICROPROCESSOR

NMI

5V

( ) R1 R1

VH = 1.3V 1+ R2 + R3

PFO

( ) VL = 1.3V

1+

R1 R1 (5V – 1.3V)

R2 – R3 (1.3V (R3 + R4))

0V

0V

VL

VH

VIN

ASSUMING R4 < < R3 THEN

( )R1

HYSTERESIS VH – VL = 5V R2

Figure 26. Adding Hysteresis to the Power-Fail Comparator

MONITORING THE STATUS OF THE BATTERY

The power-fail comparator can be used to monitor the status

of the backup battery instead of the power supply, if desired

(see Figure 27). The PFI input samples the battery voltage and

generates an active low PFO signal when the battery voltage

drops below a selected threshold. It may be necessary to apply

a test load to determine the loaded battery voltage. This is done

under processor control using CEOUT. Because CEOUT is forced

high during the battery backup mode, the test load is not applied

to the battery while it is in use, even if the microprocessor is not

powered.

5V INPUT

POWER

BATTERY

VBATT

R1 10MΩ

VCC

PFI

20kΩ

OPTIONAL

TEST LOAD

R2 10MΩ

CEOUT

PFO

LOW BATTERY

SIGNAL TO

MICROPROCESSOR

I/O PIN

CEIN

FROM

MICROPROCESSOR

I/O PIN APPLIES

TEST LOAD

TO BATTERY

Figure 27. Monitoring the Battery Status

Rev. C | Page 15 of 24

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