UT1553B/BCRTMP-WPA 데이터 시트보기 (PDF) - Aeroflex UTMC

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UT1553B/BCRTMP-WPA

Bus Controller Remote Terminal Multi-Protocol (BCRTMP)

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#10 Remote Terminal Address Register

This register sets the Remote Terminal Address via software. The Change Lock-Out Enable feature, when set, prevents the Remote

Terminal Address or the BCRTMP Mode Selection from changing. Note that MD4 also controls the effect of BITs 9-15 on status

word generation. See section 8.2.8.

Bit

Number

Description

BIT 15

(RT) Instrumentation. Setting this bit sets the RT status word Instrumentation bit.

BIT 14

(RT) Busy. Setting this bit sets the RT status word Busy bit. It does not inhibit data transfers to the subsystem.

BIT 13

(RT) Subsystem Fail. Setting this bit sets the RT status word Subsystem Flag bit. In the RT mode,theSubsystem

Fail is also logged into the Message Status Word.

BIT 12

(RT) Dynamic Bus Control Acceptance. Setting this bit sets the RT status word Dynamic Bus Control

Acceptance bit when the BCRTMP receives the Dynamic Bus Control Mode Code from the currently active Bus

Controller. Host intervention is required for the BCRTMP to take over as the active Bus Controller.

BIT 11

(RT) Terminal Flag. Setting this bit sets the RT status word Terminal Flag bit; the Terminal Flag bit in the RT

status word is also internally set if the BIT fails.

BIT 10

(RT) Service Request. Setting this bit sets the RT status word Service Request bit.

BIT 9

(RT) Busy Mode Enable. Setting this bit sets the RT status word Busy bit and inhibits all data transfers to the

subsystem. (See Forced Busy Mode, section 8.2.4.)

BIT 8

BC/RT Mode Select. This bit’s state reflects the external pin BCRTSEL. It does not necessarily reflect the state

of the chip, since the BC/RT Mode Select is software-programmable via bit 10 of Register 0. This bit is

read-only.

BIT 7

Change Lock-Out. This bit’s state reflects the external pin LOCK. When set, this bit indicates that changestothe

RT address or the BC/RT Mode Select are not allowed using internal registers. This bit is read-only.

BIT 6

Remote Terminal Address Parity Error. This bit indicates a Remote Terminal Address Parity error. It appears

after the Remote Terminal Address is latched if a parity error exists.

BIT 5

Remote Terminal Address Parity. This is an odd parity input bit used with the Remote Terminal Address. It

ensures accurate recognition of the Remote Terminal Address.

BITs 4-0

Remote Terminal Address (Bit 0 is the LSB). This reflects the RTA4-0 inputs at Master Reset. Modify the

Remote Terminal Address by writing to these bits.

#11 BIT Start Register (Write Only)

Any write (i.e., data = don’t care) to this register’s address location initiates the internal BIT routine, which lasts

100µs. Verify using the BIT-in-Progress bit in the Status Register. If the BCRTMP is online (Bit 0 of Register 1 is high), a

programmed reset (write to Register 12) must precede a write to this register to initiate the internal BIT.

The BCRTMP’s self-test performs an internal wrap-around test between its Manchester encoder and its two Manchester decoders.

If the BCRTMP detects a failure on either the primary or the secondary channel, it flags this failure by setting bit 14 of Register

4 (BIT Word Register) for Channel A and/or bit 15 for Channel B. When in the Remote Terminal mode, while the BCRTMP is

performing its self-test, it ignores any commands on the 1553 bus until it has completed the self-test.

#12 Programmed Reset Register (Write Only)

Any write (i.e., data = don’t care) to this register’s address location initiates a reset sequence of the encoder/decoder and protocol

sections of the BCRTMP which lasts less than 1µs. This is identical to the reset used for the Reset Remote Terminal Mode Code

except that command processing halts. For a total reset (i.e., including registers), see the MRST signal description.

#13 RT Timer Reset Register (Write Only)

Any write (i.e., data = don’t care) to this register’s address location resets the RT Time Tag timer to zero. The BCRTMP’s Remote

Terminal Timer time-tags message transactions. The time tag is generated from a free-running eight-bit timer of 64µs resolution.

This timer can be reset to zero simply by writing to Register 13. When the timer is reset, it immediately starts running.

BCRTMP-21

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