AD9911 데이터 시트보기 (PDF) - Analog Devices

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AD9911

500 MSPS Direct Digital Synthesizer with 10-Bit DAC

Analog Devices 

Data Sheet

APPLICATION CIRCUITS

REFERENCE

AD9510, AD9511, ADF4106

÷

PHASE

CHARGE

COMPARATOR

PUMP

÷

LOOP

FILTER

VCO

AD9911

AD9911 REF CLK

LPF

Figure 32. DDS in PLL Feedback Locking to Reference Offering Fine Frequency and Delay Adjust Tuning

CLOCK

SOURCE

AD9510

CLOCK DISTRIBUTOR

WITH

DELAY EQUALIZATION

AD9510

SYNCHRONIZATION

DELAY EQUALIZATION

DATA

FPGA

SYNC_CLK

FPGA

DATA

SYNC_CLK

REF_CLK

SYNC_OUT

C1

S1

AD9911

A1

(MASTER)

C2

S2

AD9911

A2

(SLAVE 1)

CENTRAL

CONTROL

FPGA

DATA

SYNC_CLK

C3

S3AD9911

A3

(SLAVE 2)

FPGA

DATA

SYNC_CLK

C4

S4AD9911

(SLAVE 3)

A4

A_END

Figure 33. Synchronizing Multiple Devices to Increase Channel Capacity Using the AD9510 as a Clock Distributor for the Reference and SYNC Clock

PROGRAMMABLE 1 TO 32

DIVIDER AND DELAY ADJUST

CLOCK OUTPUT

SELECTION(S)

REF CLK

AD9911 CH 2

LPF

AD9515

AD9514

AD9513

AD9512

n

LVPECL

LVDS

CMOS

n = DEPENDANT ON PRODUCT SELECTION.

Figure 34. Clock Generation Circuit Using the AD951x Series of Clock Distribution Chips

Rev. A | Page 17 of 41

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