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AD9601BCPZ-250 데이터 시트보기 (PDF) - Analog Devices
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AD9601BCPZ-250
10-Bit, 200 MSPS/250 MSPS 1.8 V Analog-to-Digital Converter
Analog Devices
AD9601BCPZ-250 Datasheet PDF : 32 Pages
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TIMING DIAGRAMS
CLK+
CLK–
DCO–
DCO+
DAX
N+1
N+2
N
t
A
t
CLK
= 1/
f
CLK
N+3
N+4
N+5
N+6
N+7
N+8
t
CPD
t
SKEW
t
PD
N–7
N–6
N–5
N–4
N–3
N–2
N–1
N
N+1 N+2
Figure 2. Single Port Mode
CLK+
CLK–
DCO+
DCO–
DAX
DBX
N+1
N+2
N
t
A
t
CLK
= 1/
f
CLK
N+3
N+4
N+5
N+6
N+7
N+8
t
CPDA
t
CPDB
t
PDA
t
SKEWA
N–6
N–4
t
SKEWB
N–2
N–7
t
PDB
N–5
N–3
Figure 3. Interleaved Mode
N–1
N
N+2
N+1
AD9601
Rev. 0 | Page 7 of 32
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