ADCMP608/ADCMP609
TYPICAL APPLICATION CIRCUITS
0.1µF
2.5V TO 5V
INPUT
2kΩ
2kΩ
ADCMP608
0.1µF
OUTPUT
Figure 18. Self-Biased 50% Slicer
LVDS 100Ω
ADCMP608
CMOS
VDD
2.5V TO 5V
OUTPUT
Figure 19. LVDS to CMOS Receiver
39kΩ
5V
20kΩ
39kΩ
ADCMP609
470pF
LE/HYS
OUTPUT
CONTROL
VOLTAGE
0V TO 2.5V
150kΩ
150kΩ
Figure 20. Voltage Controlled Oscillator
Preliminary Technical Data
2.5V
INPUT
1.25V
±50mV
ADCMP608
CMOS
PWM
OUTPUT
INPUT
1.25V
REF
10kΩ
10kΩ
10kΩ
ADCMP609
220pF
LE/HYS
100kΩ
Figure 21. Oscillator and Pulse Width Modulator
5V
INPUT
VREF
10kΩ
ADCMP609 0.02µF
0.1µF
LE/HYS
10kΩ
+
OUTPUT
–
Figure 22. Duty Cycle to Differential Voltage
2.5V TO 5V
ADCMP609
DIGITAL
INPUT
74AHC
1G07
LE/HYS
HYSTERESIS
CURRENT
10kΩ
Figure 23. DAC Hysteresis Adjustment with Latch
Rev. PrA | Page 12 of 16