MC9S08QE8C32 데이터 시트보기 (PDF) - Freescale Semiconductor

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MC9S08QE8C32

8-Bit HCS08 Central Processor Unit (CPU)

Freescale Semiconductor 

Electrical Characteristics

3.10 AC Characteristics

This section describes timing characteristics for each peripheral system.

3.10.1 Control Timing

Table 12. Control Timing

Num C

Rating

Symbol

Min

Typical1 Max Unit

1

D Bus frequency (tcyc = 1/fBus)

fBus

dc

—

10

MHz

2 D Internal low power oscillator period

tLPO

700

—

1300 μs

3 D External reset pulse width2

textrst

100

—

—

ns

4 D Reset low drive

trstdrv

34 × tcyc

—

—

ns

5

D

BKGD/MS setup time after issuing background debug

force reset to enter user or BDM modes

tMSSU

500

—

—

ns

6

D

BKGD/MS hold time after issuing background debug

force reset to enter user or BDM modes 3

tMSH

100

—

—

μs

IRQ pulse width

7

D Asynchronous path2

Synchronous path4

8 D Keyboard interrupt pulse width

Asynchronous path2

Synchronous path4

Port rise and fall time —

Low output drive (PTxDS = 0) (load = 50 pF)5

Slew rate control disabled (PTxSE = 0)

Slew rate control enabled (PTxSE = 1)

9

C

Port rise and fall time —

High output drive (PTxDS = 1) (load = 50 pF)5

Slew rate control disabled (PTxSE = 0)

Slew rate control enabled (PTxSE = 1)

tILIH, tIHIL

100

—

1.5 × tcyc

—

tILIH, tIHIL

100

—

1.5 × tcyc

—

tRise, tFall

—

16

—

23

tRise, tFall

—

5

—

9

—

ns

—

—

ns

—

—

ns

—

—

ns

—

10 C Voltage regulator recovery time

tVRR

—

4

—

μs

1 Typical values are based on characterization data at VDD = 3.0 V, 25 °C unless otherwise stated.

2 This is the shortest pulse that is guaranteed to be recognized as a reset pin request.

3 To enter BDM mode following a POR, BKGD/MS should be held low during the power-up and for a hold time of tMSH after VDD

rises above VLVD.

4 This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or

may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized.

5 Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40°C to 85°C.

RESET PIN

textrst

Figure 15. Reset Timing

MC9S08QE8 Series Data Sheet, Rev. 7

20

Freescale Semiconductor

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