GM5115H 데이터 시트보기 (PDF) - Genesis Microchip

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GM5115H

OnPanel LCD Panel Controller

Genesis Microchip 

*** Genesis Microchip Confidential ***

gm5115/25 Preliminary Data Sheet

4. FUNCTIONAL DESCRIPTION

A functional block diagram is illustrated below. Each of the functional units shown is described

in the following sections.

NVRAM

Serial I/F Serial Host I/F

GPIO

Parallel

ROM IF

Crystal

Reference

DVI-Compliant

Input

Analog RGB

Input

Host

Interface

Ultra-Reliable

DVI Rx

HDCP

Triple ADC

and PLL

Test Pattern

Generator

8051-style

Micro-

controller

MCU

RAM

External

ROM I/F

Internal

ROM

OSD

Controller

OSD

RAMs

Clock

Generation

Panel

Timing

Controller

Image

Capture /

Measure-

ment

Brightness /

Contrast /

Hue / Sat /

RealColor /

Moire

Zoom /

Shrink /

Filter

Gamma

Control

Output

Data

Path

Timing

Control

Signals

Panel Data

Figure 3.

gm5115/25 Functional Block Diagram

4.1 Clock Generation

The gm5115/25 features three clock inputs. All additional clocks are internal clocks derived from

one or more of these:

1. Crystal Input Clock (TCLK and XTAL). This is the input pair to an internal crystal oscillator

and corresponding logic. A 14.3 MHz TV crystal is recommended. Other crystal frequencies

may be used, but require custom programming. This is illustrated in Figure 4 below.

Alternatively, a single-ended TTL/CMOS clock oscillator can be driven into the TCLK pin

(leave XTAL as N/C in this case). This is illustrated in Figure 7 below. This option is

selected by connecting a 10KΩ pull-up to ROM_ADDR13 (refer to Table 18). See also Table

14.

2. DVI Differential Input Clock (RC+ and RC-)

3. Host Interface Transfer Clock (HCLK)

June 2002

10

C5115-DAT-01H

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