ADP3203 데이터 시트보기 (PDF) - Analog Devices

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ADP3203

2-Phase IMVP-II and IMVP-III Core Controller for Mobile CPUs

Analog Devices 

ADP3203

VIN

Q1

VSW

Q2

VH

L IL

RCS

COC

RC

CO +

RE

VOUT

LOAD

RD

VREF

Figure 3. Modified Hysteretic Regulator with ADOPT

The implementation requires adding a resistive divider (RC and

RD) between the reference voltage and the output and connect-

ing the tap of the divider to the noninverting input of the

hysteretic comparator. A capacitor, COC, is placed across the

upper member (RC) of the divider.

It is easily shown that the output impedance of the converter

can be no less than the ESR of the output capacitor. A straight-

forward derivation demonstrates that the output impedance of

the converter in Figure 3 can be minimized to equal the ESR,

RE, when the following two equations are valid (neglecting PCB

trace resistance for now):

RD = RE − RCS

RC

RCS

(1)

and

COC

=

CO R2E

RCS RD

(2)

From Equation 2, the series resistance is:

RCS

=

RE

1 + RD

(3)

RC

This is the ADOPT configuration and design procedure that

allows the maximum possible ESR to be used while meeting a

given load line specification.

It can be seen from Equation 3 that unless RD is zero or RC is

infinite, RCS will always be smaller than RE. An advantage of the

circuit of Figure 3 is that if we select the ratio RD/RC well above

unity, the additional dissipation introduced by the series

resistance RCS will be negligible. Another interesting feature of

the circuit in Figure 3 is that the ac voltage across the two

inputs of the hysteretic comparator is now equal only to the ac

voltage across RCS. This is due to the presence of the capacitor

COC, which effectively couples the ac component of the output

voltage to the noninverting input voltage of the comparator.

Since the comparator sees only the ac voltage across RCS, in the

circuit of Figure 3 the dependence of the switching frequency

on the ESR of the output capacitor is completely eliminated.

Equation 4 presents the expression for the switching frequency.

f = RCS (VIN − VOUT )VOUT

LVH

VIN

(4)

Multiphase Hysteretic Regulator with ADOPT

Multiphase converters have very important advantages, includ-

ing reduced rms current in the input filter capacitor (allowing

the use of a smaller and less expensive device), distributed heat

dissipation (reducing the hot-spot temperature and increasing

reliability), higher total power capability, increased equivalent

frequency without increased switching losses (allowing the use

of a smaller equivalent inductances, and thereby shortening the

load transient time), and reduced ripple current in the output

capacitor (reducing the output ripple voltage and allowing the

use of a smaller and less expensive output capacitor). Also, they

have some disadvantages, which should be considered when

choosing the number of phases. Those disadvantages include

the need for more switches and output inductors than in a

single-phase design (leading to a higher cost than a single-phase

solution, at least below a certain power level), more complex

control, and the possibility of uneven current sharing among the

phases.

The family of ADP320x controllers alleviates two of the above

disadvantages of multiphase converters. It presents a simple and

cost-effective control solution and provides perfect current

sharing among the phases. Figure 4 shows a simplified block

diagram of a 3-phase converter using the control principle

implemented with the ADP3203, the 3-phase member of the

ADP320x family.

As Figure 4 shows, in the multiphase configuration the ripple

current signal is multiplexed from all channels. During the on

time of any given channel, its current is compared to the upper

threshold of the hysteretic comparator. When the current

reaches the upper threshold, the control FET of that channel is

turned off. During the common off time of all channels, their

currents are averaged and compared to the lower threshold.

When the averaged channel current reaches the lower threshold,

the hysteretic comparator changes state again and turns on the

control FET of the next channel, as selected by the phase

–14–

REV. 0

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