CC2430
capture the timing of edges on input signals.
See section 13.6 for details.
MAC timer (Timer 2) is specially designed for
supporting an IEEE 802.15.4 MAC or other
time-slotted protocols in software. The timer
has a configurable timer period and an 8-bit
overflow counter that can be used to keep
track of the number of periods that have
transpired. There is also a 16-bit capture
register used to record the exact time at which
a start of frame delimiter is
received/transmitted or the exact time of which
transmission ends, as well as a 16-bit output
compare register that can produce various
command strobes (start RX, start TX, etc) at
specific times to the radio modules. See
section 13.7 for details.
Timers 3 and 4 are 8-bit timers with
timer/counter/PWM functionality. They have a
programmable prescaler, an 8-bit period value
and one programmable counter channel with a
8-bit compare value. Each of the counter
channels can be used as PWM outputs. See
section 13.8 for details.
USART 0 and 1 are each configurable as
either an SPI master/slave or a UART. They
provide double buffering on both RX and TX
and hardware flow-control and are thus well
suited to high-throughput full-duplex
applications. Each has its own high-precision
baud-rate generator thus leaving the ordinary
timers free for other uses. When configured as
an SPI slave they sample the input signal
using SCK directly instead of some over-
sampling scheme and are thus well-suited to
high data rates. See section 13.14 for details.
The AES encryption/decryption core allows
the user to encrypt and decrypt data using the
AES algorithm with 128-bit keys. The core is
able to support the AES operations required by
IEEE 802.15.4 MAC security, the ZigBee®
network layer and the application layer. See
section 13.12 for details.
The ADC supports 7 to 12 bits of resolution in
a 30 kHz to 4 kHz bandwidth respectively. DC
and audio conversions with up to 8 input
channels (Port 0) are possible. The inputs can
be selected as single ended or differential.
The reference voltage can be internal, AVDD,
or a single ended or differential external signal.
The ADC also has a temperature sensor input
channel. The ADC can automate the process
of periodic sampling or conversion over a
sequence of channels. See Section 13.10 for
details.
9.2 Radio
CC2430 features an IEEE 802.15.4 compliant
radio based on the leading CC2420 transceiver.
See Section 14 for details.
Table 22: CC2430 Flash Memory Options
Device
CC2430F32
CC2430F64
CC2430F128
Flash
32 KB
64 KB
128 KB
CC2430 Data Sheet (rev. 2.1) SWRS036F
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