DT28F320S3 데이터 시트보기 (PDF) - Intel
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DT28F320S3 Datasheet PDF : 52 Pages
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28F160S3, 28F320S3
E
Table 2. Bus Operations
Mode
Read
Output Disable
Standby
Reset/Power-
Down Mode
Notes
1,2
10
RP#
VIH
VIH
VIH
VIL
CE0#
VIL
VIL
VIL
VIH
VIH
X
CE1# OE#(11) WE#(11)
VIL
VIL
VIH
VIL
VIH
VIH
VIH
X
X
VIL
VIH
X
X
X
Address
X
X
X
X
VPP
DQ(8) STS(3)
X
DOUT
X
X
High Z
X
X
High Z
X
X
High Z High Z(9)
Read Identifier
4
VIH
VIL
VIL
VIL
VIH
See
Codes
Figure 6
X
DOUT High Z(9)
Read Query
5
VIH
VIL
VIL
VIL
VIH See Table 6
X
DOUT High Z(9)
Write
3,6,7 VIH VIL
VIL
VIH
VIL
X
VPPH1/2
DIN
X
NOTES:
1. Refer to Table 19. When VPP ≤ VPPLK, memory contents can be read, but not altered.
2. X can be VIL or VIH for control and address input pins and VPPLK or VPPH1/2 for VPP. See Table 19, for VPPLK and VPPH1/2
voltages.
3. STS in level RY/BY# mode (default) is VOL when the WSM is executing internal block erase, programming, or lock-bit
configuration algorithms. It is VOH when the WSM is not busy, in block erase suspend mode (with programming inactive),
program suspend mode, or deep power-down mode.
4. See Section 4.3 for read identifier code data.
5. See Section 4.2 for read query data.
6. Command writes involving block erase, write, or lock-bit configuration are reliably executed when VPP = VPPH1/2 and
VCC = VCC1/2 (see Section 6.2).
7. Refer to Table 3 for valid DIN during a write operation.
8. DQ refers to DQ0–7 if BYTE# is low and DQ0–15 if BYTE# is high.
9. High Z will be VOH with an external pull-up resistor.
10. RP# at GND ± 0.2V ensures the lowest deep power-down current.
11. OE# = VIL and WE# = VIL concurrently is an undefined state and should not be attempted.
14
ADVANCE INFORMATION
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