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DT28F160S3-75 데이터 시트보기 (PDF) - Intel

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DT28F160S3-75 Datasheet PDF : 52 Pages
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E
28F160S3, 28F320S3
Offset
(P+C)h
(P+D)h
(P+E)h
Table 11. Primary-Vendor Specific Extended Query (Continued)
Length
(bytes)
Description
Data
01h
VCC Logic Supply Optimum Program/Erase voltage (highest 3D:
0050h
performance)
bits 7–4
bits 3–0
BCD value in volts
BCD value in 100 mv
01h
VPP [Programming] Supply Optimum Program/Erase voltage 3E:
0050h
bits 7–4
bits 3–0
HEX value in volts
BCD value in 100 mv
reserved Reserved for future use
Table 12. Identifier Codes
Code
Address(2) Data
Manufacturer Code
000000
B0
Device Code
16 Mbit 000001 D0
32 Mbit 000001 D4
Block Lock Configuration
X0002(1)
Block is Unlocked
DQ0 = 0
Block is Locked
Reserved for Future Use
DQ0 = 1
DQ2-7
Block Erase Status
x0002(1)
Last erase completed
successfully
DQ1 = 0
Last erase did not
complete successfully
DQ1 = 1
Reserved for Future Use
DQ2-7
NOTES:
1. X selects the specific block lock configuration code.
See Figure 6 for the device identifier code memory
map.
2. A0 should be ignored in this address. The lowest order
address line is A1 in both word and byte mode.
4.3 Read Identifier Codes
Command
The identifier code operation is initiated by writing
the Read Identifier Codes command. Following the
command write, read cycles from addresses shown
in Figure 6 retrieve the manufacturer, device, block
lock configuration, and block erase status codes
(see Table 12 for identifier code values). To
terminate the operation, write another valid
command. Like the Read Array command, the
Read Identifier Codes command functions
independently of the VPP voltage. Following the
Read Identifier Codes command, the information in
Table 12 can be read.
4.4 Read Status Register
Command
The Status Register may be read to determine
when programming, block erasure, or lock-bit
configuration is complete and whether the operation
completed successfully. It may be read at any time
by writing the Read Status Register command.
After writing this command, all subsequent read
operations output data from the Status Register
until another valid command is written. The Status
Register contents are latched on the falling edge of
OE#, CE0#, or CE1# whichever occurs last. OE# or
CEX# must toggle to VIH to update the Status
Register latch. The Read Status Register command
functions independently of the VPP voltage.
ADVANCE INFORMATION
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