HT48R10A-1 데이터 시트보기 (PDF) - Holtek Semiconductor
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HT48R10A-1 Datasheet PDF : 38 Pages
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HT48R10A-1/HT48C10-1
The states of the registers is summarized in the table.
Register
Reset
(Power On)
WDT time-out
RES Reset
(Normal Operation) (Normal Operation)
TMR
xxxx xxxx
xxxx xxxx
xxxx xxxx
TMRC
00-0 1000
00-0 1000
00-0 1000
Program
Counter
000H
000H
000H
MP
-xxx xxxx
-uuu uuuu
-uuu uuuu
ACC
xxxx xxxx
uuuu uuuu
uuuu uuuu
TBLP
xxxx xxxx
uuuu uuuu
uuuu uuuu
TBLH
--xx xxxx
--uu uuuu
--uu uuuu
STATUS --00 xxxx
--1u uuuu
--uu uuuu
INTC
--00 -000
--00 -000
--00 -000
WDTS
0000 0111
0000 0111
0000 0111
PA
1111 1111
1111 1111
1111 1111
PAC
1111 1111
1111 1111
1111 1111
PB
1111 1111
1111 1111
1111 1111
PBC
1111 1111
1111 1111
1111 1111
PC
---1 1111
---1 1111
---1 1111
PCC
---1 1111
---1 1111
---1 1111
Note:
²*² means ²warm reset²
²u² means ²unchanged²
²x² means ²unknown²
RES Reset
(HALT)
xxxx xxxx
00-0 1000
000H
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
--01 uuuu
--00 -000
0000 0111
1111 1111
1111 1111
1111 1111
1111 1111
---1 1111
---1 1111
WDT Time-out
(HALT)*
uuuu uuuu
uu-u uuuu
000H
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
--11 uuuu
--uu -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---u uuuu
---u uuuu
Timer/Event Counter
A timer/event counters (TMR) is implemented in the
microcontroller. The timer/event counter contains an
8-bit programmable count-up counter and the clock may
come from an external source or from the system clock
or RTC.
Using the internal clock sources, there are 2 reference
time-bases for timer/event counter. The internal clock
source can be selected as coming from (can always be
optioned) or fRTC (enabled only system oscillator in the
Int. RC+RTC mode) by options. Using external clock in-
put allows the user to count external events, measure
time internals or pulse widths, or generate an accurate
time base. While using the internal clock allows the user
to generate an accurate time base.
Bit No.
0~2
3
4
5
6
7
Label
Function
PSC0~PSC2
To define the prescaler stages, PSC2, PSC1, PSC0=
000: fINT=fSYS/2 or fRTC/2
001: fINT=fSYS/4 or fRTC/4
010: fINT=fSYS/8 or fRTC/8
011: fINT=fSYS/16 or fRTC/16
100: fINT=fSYS/32 or fRTC/32
101: fINT=fSYS/64 or fRTC/64
110: fINT=fSYS/128 or fRTC/128
111: fINT=fSYS/256 or fRTC/256
TE
To define the TMR active edge of timer/event counter
(0=active on low to high; 1=active on high to low)
TON
To enable or disable timer counting (0=disabled; 1=enabled)
¾
Unused bit, read as ²0²
TM0
TM1
To define the operating mode
01=Event count mode (external clock)
10=Timer mode (internal clock)
11=Pulse width measurement mode
00=Unused
TMRC (0EH) Register
Rev. 1.90
13
November 4, 2005
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