MAX1839 데이터 시트보기 (PDF) - Maxim Integrated

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MAX1839

Wide Brightness Range CCFL Backlight Controllers

Maxim Integrated 

Wide Brightness Range

CCFL Backlight Controllers

allow the circuit to operate in dropout at extremely low

battery voltages where the backlight’s performance is

secondary. All backlight circuit designs can undergo a

transient overvoltage condition when the laptop is

plugged into the AC adapter and VBATT suddenly

increases. The MAX1739/MAX1839 contain a unique

clamp circuit on VCCI. Along with the feed-forward cir-

cuitry, it ensures that there is not a transient transformer

overvoltage when leaving dropout.

The PK_DET_CLAMP circuit limits VCCI to the peaks of

the buck-regulator’s PWM ramp generator. As the cir-

cuit reaches dropout, VCCI approaches the peaks of

the PWM ramp generator in order to reach maximum

duty cycle. If VBATT decreases further, the control loop

loses regulation and VCCI tries to reach its positive sup-

ply rail. The clamp circuit on VCCI keeps this from hap-

pening, and VCCI rides just above the peaks of the

PWM ramp. As VBATT decreases further, the feed-for-

ward PWM ramp generator loses amplitude and the

clamp drags VCCI down with it to a voltage below

where VCCI would have been if the circuit was not in

dropout. When VBATT is suddenly increased out of

dropout, VCCI is still low and maintains the drive on the

transformer at the old dropout level. The circuit then

slowly corrects and increases VCCI to bring the circuit

back into regulation.

Buck Regulator

The buck regulator uses the signals from the PWM

comparator, the current-limit detection on CS, and

DPWM signals to control the high-side MOSFET duty

cycle. The regulator uses voltage-mode PWM control

and is synchronized to the Royer oscillator. A falling

edge on SYNC turns on the high-side MOSFET after a

375ns minimum off-time delay. The PWM comparator or

the CS current limit ends the on-cycle.

Interface Selection

Table 1 lists the functionality of SH/SUS, CRF/SDA, and

CTL/SCL in each of the three interface modes of the

MAX1739/MAX1839. The MAX1739 features both an

SMBus digital interface and an analog interface, while

the MAX1839 features only the analog interface. Note

Table 1. Interface Modes

that MODE can also synchronize the DPWM frequency

(see Synchronizing the DPWM Frequency).

Dimming Range

Brightness is controlled by either the analog interface

(see Analog Interface) or the SMBus interface (see

SMBus Interface). CCFL brightness is adjusted in three

ways:

1) Lamp current control, where the magnitude of the

average lamp current is adjusted.

2) DPWM control, where the average lamp current is

pulsed to the lamp with a variable duty cycle.

3) A combination of the first two methods.

In each of the three methods, a 5-bit brightness code is

generated from the selected interface and is used to

set the lamp current and/or DPWM duty cycle.

The 5-bit brightness code defines the lamp current

level with ob00000 representing minimum lamp current

and ob11111 representing maximum lamp current. The

average lamp current is measured across an external

sense resistor (see Sense Resistors). The voltage on

the sense resistor is measured at CSAV. The brightness

code adjusts the regulation voltage at CSAV (VCSAV).

The minimum average VCSAV is VMINDAC/10, and the

maximum average is set by the following formula:

VCSAV = VREF ✕ 31 / 320 + VMINDAC / 320

which is between 193.75mV and 200mV.

Note that if VCSAV does not exceed 100mV peak (which

is about 32mV average) for over 2 seconds, the

MAX1739/MAX1839 will assume a lamp-out condition

and shut down (see Lamp-Out Detection).

The equation relating brightness code to CSAV regula-

tion voltage is:

VCSAV = VREF ✕ n / 320 + VMINDAC ✕ (32 - n) / 320

where n is the brightness code.

To always use maximum average lamp current when

using DPWM control, set VMINDAC to VREF.

DPWM control works similar to lamp current control in

that it also responds to the 5-bit brightness code. A

PIN

SH/SUS

CRF/SDA

CTL/SCL

DIGITAL

INTERFACE

MODE = VL

(MAX1739 only)

SMBus suspend

SMBus data I/O

SMBus clock input

ANALOG INTERFACE

MODE = REF,

VCTL/SCL = 0 = maximum brightness

MODE = GND,

VCTL/SCL = 0 = minimum brightness

Logic-level shutdown control input

Reference input for minimum brightness

Reference input for maximum brightness

Analog control input to set brightness (range from 0 to CRF/SDA)

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