DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MAX2120CTI(2007) 데이터 시트보기 (PDF) - Maxim Integrated

부품명
상세내역
제조사
MAX2120CTI Datasheet PDF : 21 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Complete, Direct-Conversion Tuner for DVB-S
and Free-to-Air Applications
Detailed Description
Register Description
The MAX2120 includes 12 user-programmable registers
and 2 read-only registers. See Table 1 for register con-
figurations. The register configuration of Table 1 shows
each bit name and the bit usage information for all regis-
ters. Note that all registers must be written after and no
earlier than 100μs after the device is powered up.
Table 1. Register Configuration
REG REGISTER READ/ REG
NO
NAME WRITE ADDRESS
MSB
D[7]
D[6]
DATA BYTE
D[5]
D[4]
D[3]
LSB
D[2] D[1] D[0]
1
N-Divider
MSB
Write
0x00
X
N[14]
N[13]
N[12]
N[11] N[10] N[9] N[8]
2
N-Divider
LSB
Write
0x01
N[7]
N[6]
N[5]
N[4]
N[3]
N[2] N[1] N[0]
3
Charge
Pump
Write
0x02
CPMP[1] CPMP[0] CPLIN[1] CPLIN[0]
0
0
0
0
X
X
X
X
4 Not Used Write 0x03
X
X
X
X
X
X
X
X
5 Not Used Write 0x04
X
X
X
X
XTAL
6
Divider/ Write 0x05
XD[2]
XD[1]
XD[0]
R[4]
R-Divider
X
X
X
X
R[3]
R[2] R[1] R[0]
7
PLL
Write
8
VCO
Write
9
LPF
Write
10
Control Write
11 Shutdown Write
0x06
0x07
0x08
0x09
0x0A
D24
VCO[4]
LP[7]
STBY
X
CPS
0
VCO[3]
LP[6]
X
PLL
ICP
1
VCO[2]
LP[5]
PWDN
DIV
X
VCO[1]
LP[4]
X
VCO
X
X
X
X
VCO[0]
LP[3]
BBG[3]
BB
VAS ADL ADE
LP[2] LP[1] LP[0]
BBG[2] BBG[1] BBG[0]
RFMIX RFVG FE
12
Test
Write
0x0B
CPTST[2] CPTST[1] CPTST[0]
X
0
0
0
TURBO
LD
LD
LD
MUX[2] MUX[1] MUX[0]
1
0
0
0
13
Status
Byte-1
Read
0x0C
POR
VASA
VASE
LD
X
X
X
X
14
Status
Byte-2
Read
0x0D VCOSBR[4] VCOSBR[3] VCOSBR[2] VCOSBR[1] VCOSBR[0] ADC[2] ADC[1] ADC[0]
0 = Set to “0” for factory-tested operation.
1 = Set to “1” for factory-tested operation.
X = Don’t care.
Table 2. N-Divider MSB Register
BIT NAME BIT LOCATION (0 = LSB) DEFAULT
X
7
X
N[14:8]
6–0
0000011
Table 3. N-Divider LSB Register
BIT NAME BIT LOCATION (0 = LSB) DEFAULT
N[7:0]
7–0
10110110
FUNCTION
Don’t care.
Sets the most significant bits of the PLL integer-divide number (N).
Default value is N = 950 decimal. N can range from 16 to 2175.
FUNCTION
Sets the least significant bits of the PLL integer-divide number (N).
Default value is N = 950 decimal. N can range from 16 to 2175.
10 ______________________________________________________________________________________

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]