MAX815(1995) 데이터 시트보기 (PDF) - Maxim Integrated

부품명

상세내역

제조사

MAX815
(Rev.:1995)

±1% Accuracy, Low-Power, +3V and +5V µP Supervisory Circuits

Maxim Integrated 

±1% Accuracy, Low-Power, +3V and +5V

µP Supervisory Circuits

+5V

R1

R2

VCC

MR

MAX814

MAX815 PFO

PFI MAX816

RESET

GND

100k

100k

2N3904

TO µP

V-

+5V

MR

0V

+5V

PFO

0V

V-

VTRIP

0V

5 - 2.5

=

R1

2.5 - VTRIP

R2

,

VTRIP

<

0V

VPFT = 2.5V (K, L, N); 1.70V (T AND MAX816)

Figure 12. Monitoring a Negative Voltage

BEGIN PROGRAM

SET LOW

WDI

SET HIGH

WDI

SUBROUTINE

SET LOW

WDI

YES

RETURN

NO

Figure 13. Flow Chart of WDI Implementation

BUFFERED RESET TO OTHER SYSTEM COMPONENTS

VCC

MAX814

MAX815

MAX816

4.7k

RESET

GND

VCC

µP

RESET

GND

Figure 14. Interfacing to µPs with Bidirectional Reset I/O

Negative-Going VCC Transients

In addition to issuing a reset to the µP during power-up,

power-down, and brownout conditions, the MAX814/

MAX815/MAX816 series is relatively immune to short

duration negative-going VCC transients (glitches). The

Typical Operating Characteristics show a graph of

Maximum Transient Duration vs. Reset Comparator

Overdrive, for which a reset is not generated. The

graph was made using a negative-going pulse applied

to VCC, starting 1.5V above the actual reset threshold

and ending below it by the magnitude indicated (reset

comparator overdrive). The graph indicates the typical

maximum pulse width a negative-going VCC transient

may have without causing a reset pulse. As the magni-

tude of the transient increases (goes further below the

reset threshold), the maximum allowable pulse width

decreases. Typically, a VCC that goes 100mV below the

reset threshold and lasts 30µs or less will not cause a

reset pulse to be issued.

A 0.1µF bypass capacitor mounted as close as possible

to pin 2 (VCC) provides additional transient immunity.

Interfacing to µPs

with Bidirectional Reset Pins

µPs with bidirectional reset pins, such as the Motorola

68HC11 series, can cause a conflict with the RESET

output. If, for example, the RESET output is driven high

and the µP wants to pull it low, indeterminate logic lev-

els may result. To correct this, connect a 4.7kΩ resistor

between the RESET output and the µP reset I/O, as in

Figure 14. Buffer the RESET output to other system

components.

14 ______________________________________________________________________________________

Share Link: