NX25P10 데이터 시트보기 (PDF) - Unspecified

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NX25P10

1M-BIT, 2M-BIT AND 4M-BIT Serial Flash Memory with 40MHz SPI

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1M / 2M / 4M-BIT SERIAL FLASH MEMORY with 40MHz SPI

NX25P10, NX25P20 AND NX25P40

Sector Erase (D8h)

The Sector Erase instruction sets all memory within a

specified sector to the erased state of all 1s (FFh). A Write

Enable instruction must be executed before the device will

accept the Erase Sector Instruction (Status Register bit

WEL must equal 1). The instruction is initiated by driving the

CS pin low and shifting the instruction code “D8h” followed

a 24-bit sector address (A23-A0) (see Figure 1). The lowest

16 address bits (A15-A0) must be set to 0. The Sector Erase

instruction sequence is shown in figure 11.

The CS pin must be driven high after the eighth bit of the last

byte has been latched. If this is not done the Sector Erase

instruction will not be executed. After CS is driven high, the

1 self-timed Sector Erase instruction will commence for a time

duration of tSE (See AC Characteristics). While the Sector

Erase cycle is in progress, the Read Status Register instruc-

tion may still be accessed for checking the status of the BUSY

2 bit. The BUSY bit is a 1 during the Sector Erase cycle and

becomes a 0 when the cycle is finished and the device is ready

to accept other instructions again. After the Sector Erase cycle

has started the Write Enable Latch (WEL) bit in the Status

Register is cleared to 0. The Sector Erase instruction will not

3 be executed if the addressed page is protected by the Block

Protect (BP2, BP1, BP0) bits (see Table 2).

4

CS

Mode 3

01 2 3 4 56 78 9

29 30 31

5

CLK Mode 0

Instruction (D8h)

24-Bit Address

DI

23 22

210

6

*

High Impedance

DO

7

* = MSB

Figure 11. Sector Erase Instruction Sequence Diagram

8

9

10

11

12

NexFlash Technologies, Inc.

17

PRELIMINARY MKP-0009 Rev 6 NXSF040I-0405

04/04/05 ©

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