MSM66577 데이터 시트보기 (PDF) - Oki Electric Industry

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MSM66577

16-Bit Microcontroller

Oki Electric Industry 

1Semiconductor

PEDL66577-01

MSM66577 Family

External data memory control

Parameter

Cycle time

Clock pulse width (HIGH level)

Clock pulse width (LOW level)

ALE pulse width

RD pulse width

WR pulse width

RD pulse delay time

WR pulse delay time

Low address setup time

Low address hold time

High address setup time

High address hold time

Read data setup time

Read data hold time

Write data setup time

Write data hold time

Symbol

tcyc

tφWH

tφWL

tAW

tRW

tWW

tRAD

tWAD

tALS

tALH

tAHS

tAHH

tRS

tRH

tWS

tWH

Condition

fOSC = 30 MHz

CL = 50 pF

tcyc

(VDD = 4.5 to 5.5 V, Ta = –30 to +70°C)

Min.

Max.

Unit

33.3

—

13

—

13

—

2 tφ – 10

—

2 tφ – 15

—

2 tφ – 15

—

tφ – 3

—

tφ – 3

—

ns

2 tφ – 15

—

tφ – 3

—

3 tφ – 25

—

tφ – 3

—

25

—

0

tφ – 3

2tφ – 30

—

tφ – 3

—

Note: tφ = tcyc/2

CPUCLK

ALE

RD

AD0 to AD7

A8 to A19

WR

AD0 to AD7

A8 to A19

tφWH

tφWL

tAW

tRAD

RAP0 to 7

tALS

tALH

tAHS

RAP8 to 19

tRW

A

DIN0 to 7

tRS

tRH

tAHH

tWAD

tWW

RAP0 to 7

tALS

tALH

DOUT0 to 7

tWS

tWH

tAHS

RAP8 to 19

tAHH

Bus timing during no wait cycle time

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