AD7846 데이터 시트보기 (PDF) - Analog Devices

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AD7846

LC2MOS 16-Bit Voltage Output DAC

Analog Devices 

AD7846

VREF+

SEGMENT 16

DAC1

S1

S3

S15

S17

DAC2

S2

S4

A1

S14

S16

A2

DAC3

12-BIT DAC

R

RIN

R

A3

VOUT

DB11 TO DB0

DB15 TO DB12

DB15 TO DB12

VREF–

SEGMENT 1

Figure 21. Digital-to-Analog Conversion

OUTPUT STAGE

The output stage of the AD7846 is shown in Figure 22. It is capable

of driving a 2 kΩ/1000 pF load. It also has a resistor feedback

network that allows the user to configure it for gains of 1 or 2.

Table 6 shows the different output ranges that are possible.

An additional feature is that the output buffer is configured as a

track-and-hold amplifier. Although normally tracking its input,

this amplifier is placed in a hold mode for approximately 2.5 μs

after the leading edge of LDAC. This short state keeps the DAC

output at its previous voltage while the AD7846 is internally

changing to its new value. Thus, any glitches that occur in the

transition are not seen at the output. In systems where the

LDAC is tied permanently low, the deglitching is not in

operation. Figure 13 and Figure 14 show the outputs of the

AD7846 without and with the deglitcher.

RIN

10kΩ

10kΩ

C1

DAC3

ONE

SHOT

LDAC

Figure 22. Output Stage

VOUT

Rev. G | Page 12 of 24

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