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X28HC64J-90 데이터 시트보기 (PDF) - Xicor -> Intersil
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X28HC64J-90
5 Volt, Byte Alterable E2PROM
Xicor -> Intersil
X28HC64J-90 Datasheet PDF : 24 Pages
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X28HC64
WRITE CYCLE LIMITS
Symbol
Parameter
t
WC(5)
t
AS
t
AH
t
CS
t
CH
t
CW
t
OES
t
OEH
t
WP
t
WPH(6)
t
DV(6)
t
DS
t
DH
t
DW(6)
t
BLC
Write Cycle Time
Address Setup Time
Address Hold Time
Write Setup Time
Write Hold Time
CE
Pulse Width
OE
HIGH Setup Time
OE
HIGH Hold Time
WE
Pulse Width
WE
HIGH Recovery
Data Valid
Data Setup
Data Hold
Delay to Next Write
Byte Load Cycle
WE
Controlled Write Cycle
ADDRESS
CE
tAS
tAH
tCS
Min.
0
50
0
0
50
0
0
50
50
50
0
10
0.15
Typ.
(1)
2
tWC
tCH
Max.
5
1
100
Units
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
µ
s
ns
ns
µ
s
µ
s
3857 PGM T11.2
OE
WE
DATA IN
DATA OUT
tOES
tDV
tOEH
tWP
DATA VALID
tDS
tDH
HIGH Z
3857 FHD F06
Notes:
(5) t
WC
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
time the device requires to automatically complete the internal write operation.
(6) t
WPH
and t
DW
are periodically sampled and not 100% tested.
13
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