68HC705JB3 데이터 시트보기 (PDF) - Freescale Semiconductor

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68HC705JB3

8-bit microcontroller units (MCUs)

Freescale Semiconductor 

Freescale Semiconductor, Inc.

GENERAL RELEASE SPECIFICATION November 5, 1998

• Power-Saving STOP and WAIT Modes

• Available in 20-pin PDIP, 20-pin SOIC, 28-pin PDIP, and 28-pin SOIC

packages

1.2 MASK OPTIONS

The following mask options are available:

• External interrupt pins (IRQ, PA0 to PA3):

[edge-triggered or edge-and-level-triggered]

• Port A, port B, and port C pull-down/pull-up resistors:

[connected or disconnected]

• PA0-PA3 external interrupt capability:

[enabled or disabled]

• OSC, crystal/ceramic resonator startup delay:

[4064 or 224 internal bus cycles]

• Low Voltage Reset (LVR):

[enabled or disabled]

• COP function of MFT:

[enabled or disabled]

1.3 MCU STRUCTURE

Figure 1-1 shows the structure of MC68HC05JB3 MCU.

MOTOROLA

1-2

GENERAL DESCRIPTION

For More Information On This Product,

Go to: www.freescale.com

MC68HC05JB3

REV 1

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