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AIF120F300-NTL(2006) 데이터 시트보기 (PDF) - Astec Semiconductor => Silicon Link

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AIF120F300-NTL
(Rev.:2006)
Astec
Astec Semiconductor => Silicon Link Astec
AIF120F300-NTL Datasheet PDF : 38 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Technical Reference Notes
AIF12W300 DC-DC Series
INPUT SPECIFICATIONS
Parameter
Operating Input Voltage
Undervoltage Threshold
(IO = 10% IO max)
Turn-on point
Turn-off point
Input Current 1
(VI = VI min, IO = IO max,
VO = VO nom)
(VI = 0 to VI max, IO = IO max,
VO = VO nom)
Input Reflected Ripple Current 2
(5Hz to 20MHz: 12µH source
impedance: Tamb = 25°C)
Inrush Transient 3
Break Regulation
CLK IN
Frequency
Voltage Level
(internal ac coupled)
Enable
Positive Logic
Low Logic - Module Off
High Logic - Module On
(Enable pin opened)
Enable Low Sourced Current
(Venable = 0.7V)
Turn-On Delay
No load input power
Turn-On Time
(IO = IO max ; VO within 1%)
(No external O/P capacitance)
Input Capacitance
Symbol
Min
Typ
VI
250
300
-
205
-
-
175
-
II max
-
-
II max
-
-
II
-
30
I2t
-
-
-
-
215
-
720
800
-
3.3
-
Venable
0
-
Venable
2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.6
Max
420
245
215
2.8
3.4
-
2.8
245
880
5.5
Unit
Vdc
V
V
A
A
mApk-pk
A2s
V
kHz
Vpk-pk
0.7
V
10
V
150
µA
380
mS
5
W
650
mS
0.8
µF
MODEL: AIF12W300 SERIES
JUNE 2006
SHEET 3 OF 37

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