MT48H16M16LFF-8 데이터 시트보기 (PDF) - Micron Technology

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MT48H16M16LFF-8

256Mb: x16 MOBILE SDRAM

Micron Technology 

ADVANCE

256Mb: x16

MOBILE SDRAM

NOTE (continued):

5. The following states must not be interrupted by any executable command; COMMAND INHIBIT or NOP commands must

be applied on each positive clock edge during these states.

Refreshing: Starts with registration of an AUTO REFRESH command and ends when tRC is met. Once tRC is

met, the SDRAM will be in the all banks idle state.

Accessing Mode

Register: Starts with registration of a LOAD MODE REGISTER command and ends when tMRD has been

met. Once tMRD is met, the SDRAM will be in the all banks idle state.

Precharging All: Starts with registration of a PRECHARGE ALL command and ends when tRP is met. Once tRP is

met, all banks will be in the idle state.

6. All states and sequences not shown are illegal or reserved.

7. Not bank-specific; requires that all banks are idle.

8. May or may not be bank-specific; if all banks are to be precharged, all must be in a valid state for precharging.

9. Deep Power-Down is a power savings feature of this BAT-RAM device. This command is Burst Terminate on

traditional SDRAM components. For Bat Ram devices, this command sequence is assigned to Deep Power Down.

10. READs or WRITEs listed in the Command (Action) column include READs or WRITEs with auto precharge enabled and

READs or WRITEs with auto precharge disabled.

11. Does not affect the state of the bank and acts as a NOP to that bank.

256Mb: x16 Mobile SDRAM

MobileRamY26L_A.p65 – Pub. 5/02

30

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2002, Micron Technology, Inc.

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