DSP56371 데이터 시트보기 (PDF) - Freescale Semiconductor

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DSP56371

high density CMOS device with 5.0-volt compatible inputs and outputs.

Freescale Semiconductor 

Signal/Connection Descriptions

Signal

Name

FSR

Table 8. Enhanced Serial Audio Interface Signals (Continued)

Signal Type

Input or output

State during

Reset

Signal Description

GPIO

disconnected

Frame Sync for Receiver—This is the receiver frame sync

input/output signal. In the asynchronous mode (SYN=0), the FSR

pin operates as the frame sync input or output used by all the

enabled receivers. In the synchronous mode (SYN=1), it operates

as either the serial flag 1 pin (TEBE=0), or as the transmitter

external buffer enable control (TEBE=1, RFSD=1).

PC1

Input, output, or

disconnected

When this pin is configured as serial flag pin, its direction is

determined by the RFSD bit in the RCCR register. When

configured as the output flag OF1, this pin will reflect the value of

the OF1 bit in the SAICR register, and the data in the OF1 bit will

show up at the pin synchronized to the frame sync in normal

mode or the slot in network mode. When configured as the input

flag IF1, the data value at the pin will be stored in the IF1 bit in the

SAISR register, synchronized by the frame sync in normal mode

or the slot in network mode.

Port C1—When the ESAI is configured as GPIO, this signal is

individually programmable as input, output, or internally

disconnected.

The default state after reset is GPIO disconnected.

Internal Pull down resistor.

This input is 5 V tolerant.

FST

Input or output

GPIO

Frame Sync for Transmitter—This is the transmitter frame sync

disconnected input/output signal. For synchronous mode, this signal is the

frame sync for both transmitters and receivers. For asynchronous

mode, FST is the frame sync for the transmitters only. The

direction is determined by the transmitter frame sync direction

(TFSD) bit in the ESAI transmit clock control register (TCCR).

PC4

Input, output, or

disconnected

Port C4—When the ESAI is configured as GPIO, this signal is

individually programmable as input, output, or internally

disconnected.

The default state after reset is GPIO disconnected.

Internal Pull down resistor.

This input is 5 V tolerant.

18

DSP56371 Technical Data

Freescale Semiconductor

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