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EM25LV512-25MS 데이터 시트보기 (PDF) - ELAN Microelectronics

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EM25LV512-25MS
EMC
ELAN Microelectronics EMC
EM25LV512-25MS Datasheet PDF : 30 Pages
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EM25LV512
512 K (64K x 8) Bits Serial Flash Memory
SPECIFICATION
At Power-up, the device is in the following state:
The device is in the Standby mode (not the Deep Power-Down mode).
The Write Enable Latch (WEL) bit is reset.
At Power-down, when VCC drops from the operating voltage to below the POR threshold value
(VWI), all operations are disabled and the device does not respond to any instruction. If a
Power-down occurs while a Write, Program, or Erase cycle is in progress, some data
corruption may occur.
VCC
VCC(max)
Program, Erase and Write Commands are Rejected by the Device
VCC(min)
VWI
Chip Selection Not Allowed
Reset State of
the Device
tPUW
tVSL
Read Access Allowed
Device Fully
Accessible
time
Figure 4: Power-up Timing
Symbol
VWI
tVSL
tPUW
Parameter
Min
Write Inhibit Voltage
1
VCC(min) to S# low
10
Time Delay to Write Instruction
1
Table 8: Power-Up Timing and VWI Threshold Voltage
Max
2
10
Unit
V
µs
ms
This specification is subject to change without further notice. (11.08.2004 V1.0)
Page 19 of 30

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