KS8695P 데이터 시트보기 (PDF) - Micrel

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KS8695P

Integrated Multi-Port PCI Gateway Solution

Micrel 

Micrel, Inc.

KS8695P

System Clock

The clock to the KS8695P is supplied by either a 25MHz ±50ppm crystal or by an oscillator. If an oscillator is used, it must

be connected to the XCLK1 input (pin E1) on the KS8695P. If a crystal is used, it must be connected with a circuit similar

to the one shown below. The 25MHz input clock is used by an internal PLL to generate the programmable SDOCLK.

SDOCLK is the system clock and can be programmed from 25MHz to 125MHz using the system clock and bus control

register at offset 0x0004. The CPUCLKSEL strap-in option on pin M15 needs to be pulled low for normal operation.

SDICLK is used to register the data read from the SDRAM back into the KS8695P. The system designer must ensure that

SDRAM timing is met when routing SDOCLK back to SDICLK.

Figure 6. Typical Clock Circuit

May 2006

20

M9999-051806

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