LXT970A 데이터 시트보기 (PDF) - Intel

부품명

상세내역

제조사

LXT970A

Dual-Speed Fast Ethernet Transceiver

Intel 

LXT970A — Dual-Speed Fast Ethernet Transceiver

Table 7. LXT970A Hardware Control Interface Signal Descriptions

Pin#1

Pin Name I/O2

Signal Description3

Multi-Function (MF). Five dual-function configuration inputs. Each pin accepts one of four

input voltage levels (VMF1 = 5V, VMF2 = 3.5V, VMF3 = 1.5V, VMF4 = 0V).

A simple resistor divider network, as shown in Figure 20 on page 45, is required to establish

Mid-level (VMF2 and VMF3) settings. VMF1 and VMF4 (default) settings, can be established

with the LXT970A standard power supply and do not require a voltage divider. One voltage

divider may be used to drive the MF pins in designs using multiple LXT970A’s.

Each MF pin internally drives two different configuration functions. The first function

determines the 5-bit address that the LXT970A responds to on the MDIO line. The second

function determines a particular operational mode of the LXT970A. Each MF pin also

determines the state of a particular bit in the MII registers. The MDDIS input determines if this

8

MF0

effect occurs only at initialization (MDDIS = 0) or continuously (MDDIS = 1). The relationship

between the input levels and the two configuration functions are shown in Table 8 on page 16

and Table 9 on page 17.

7

MF1

The operating functions of MF4, CFGO, and CFG1 change depending on the state of MF0

(Auto-Negotiation enabled or disabled). The functions of MF4, CFG1 and FDE are

6

MF2

I interrelated.

The functions of the five MF inputs are as follows:

5

MF3

Pin MII Address MII Bit

Operating Function

4

MF4

MF0

0

0.12 Auto-Negotiation

MF1

1

19.13 Repeater Mode (Disabling DTE Mode)

MF2

2

19.4 5B Symbol Mode (Disabling 4B Nibble Mode)

MF3

3

19.3 Scrambler Operation (Disabling Scrambler)

MF4

4

4.7

Auto-Negotiation Enabled - Advertise 100 Mbps

4.8

19.2 Auto-Negotiation Disabled - Selects TX/FX

1. Pin numbers apply to all package types.

2. I/O Column Coding: I = Input, O = Output, OD = Open Drain, A = Analog.

3. FDE, CFG0, and CFG1 are affected by the MDDIS input pin. When MDDIS = 0, these inputs determine only the initial state

of the function they control. When MDDIS = 1, these inputs provide continuous hardware control over their corresponding

functions.

14

Datasheet

Share Link: