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OV7141 데이터 시트보기 (PDF) - Unspecified

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OV7141 Datasheet PDF : 20 Pages
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OV7640/OV7141 CMOS VGA (640 x 480) CAMERACHIP
Omni ision
Figure 6 VGA Frame Timing Diagram
VSYNC
3t
ROW
HREF
525 t
ROW
11 t
ROW
764 t PCLK
640 t PCLK
124 t PCLK
31 t
ROW
Y[7:0]
(Invalid Data)
Row 0 Row 1 Row 2
Last Row
(Invalid Data)
Figure 7 QVGA Frame Timing Diagram
VSYNC
3t
ROW
HREF
262.5 t
ROW
9t
ROW
382 t PCLK
320 t PCLK
62 t PCLK
Y[7:0]
(Invalid Data)
Row 0 Row 1 Row 2
10.5 t
ROW
Last Row
(Invalid Data)
Note: As the RGB, YUV and YCbCr formats use the Bayer pattern for interpolation, the first row transferred out on the Y[7:0]
bus will be invalid, as there is no row above Row #1 to provide the 'pair data' required. Because of this, the OV7640
does not enable the HREF signal during the first row read (shown above in the 'invalid data' zone).
8
Proprietary to OmniVision Technologies
Version 1.4, March 6, 2003

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