SN260 데이터 시트보기 (PDF) - STMicroelectronics
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SN260 Datasheet PDF : 88 Pages
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SN260
Pin assignment
Table 1. Pin descriptions (continued)
Pin #
Signal
Direction
Description
11 nRESET
12 VREG_OUT
I
Power
Active low chip reset (internal pull-up)
Regulator output (1.8V)
13 VDD_PADS
Power Pads supply (2.1 – 3.6V)
14 VDD_CORE
15 nSSEL_INT
Power
I
1.8V digital core supply
SPI Slave Select Interrupt (from Host to SN260)
This signal must be connected to nSSEL (Pin 21)
16 RES
17 MOSI
Reserved for future use, do not connect to any signal.
I
SPI Data, Master Out / Slave In (from Host to SN260)
18 MISO
19 VDD_PADS
O
Power
SPI Data, Master In / Slave Out (from SN260 to Host)
Pads supply (2.1 – 3.6V)
20 SCLK
21 nSSEL
I
SPI Clock (from Host to SN260)
I
SPI Slave Select (from Host to SN260)
22 PTI_EN
O
Frame signal of Packet Trace Interface (PTI)
23 PTI_DATA
24 VDD_PADS
O
Power
Data signal of Packet Trace Interface (PTI)
Pads supply (2.1 – 3.6V)
25 RES
26 nHOST_INT
Reserved for future use, do not connect to any signal.
O
Host Interrupt signal (from SN260 to Host)
27 SIF_CLK
28 SIF_MISO
I
Serial Interface, Clock (internal pull down)
O
Serial Interface, Master In / Slave Out
29 SIF_MOSI
30 nSIF_LOAD
I
Serial Interface, Master Out / Slave In
I/O
Serial Interface, load strobe (open collector with internal pull up)
31 GND
Power Ground Supply
32 VDD_FLASH
33 SDBG
Power
O
1.8V Flash memory supply
Spare Debug signal
34 LINK_ACTIVITY
35 nWAKE
O
Link and Activity signal
I
Wake Interrupt signal (from Host to SN260)
36 VDD_CORE
37 VDD_SYNTH_PRE
Power
Power
1.8V digital core supply
1.8V synthesizer and pre-scalar supply
38 OSCB
I/O
24MHz crystal oscillator or left open for when using an external clock
input on OSCA
39 OSCA
40 VDD_24MHZ
I/O
Power
24MHz crystal oscillator or external clock input
1.8V high-frequency oscillator supply
41 GND
Ground
Ground supply pad in the bottom center of the package forms Pin 41
(see the EM260 Reference Design for PCB considerations)
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