STM8S103xx, STM8S105xx
Product overview
Note:
4.14.3
LIN slave
● Autonomous header handling - one single interrupt per valid message header
● Automatic baud rate synchronization - maximum tolerated initial clock deviation ±15 %
● Synch delimiter checking
● 11-bit LIN synch break detection - break detection always active
● Parity check on the LIN identifier field
● LIN error management
● Hot plugging support
Asynchronous communication (UART mode)
● Full duplex, asynchronous communications - NRZ standard format (mark/space)
● Independently programmable transmit and receive baud rates up to 500 Kbit/s
● Programmable data word length (8 or 9 bits)
● Low-power standby mode - 2 receiver wake-up modes:
– Address bit (MSB)
– Idle line
● Muting function for multiprocessor configurations
● Overrun, noise and frame error detection
● 6 interrupt sources
● Tx, Rx parity control
In STM8S105, the LINUART also supports IrDA mode, Smartcard mode and synchronous
communication (SPI master mode).
SPI
● Maximum speed: 8 Mbit/s (fMASTER/2) both for master and slave
● Full duplex synchronous transfers
● Simplex synchronous transfers on 2 lines with a possible bidirectional data line
● Master or slave operation - selectable by hardware or software
● CRC calculation
● 1 byte Tx and Rx buffer
● Slave/master selection input pin
19/56