3.5 Input/Output Description
Table 3-3. SAMA5D3 I/O Type Description
I/O Type
GPIO
GPIO_CLK
Voltage Range
1.65–3.6V
1.65–3.6V
Analog
—
—
Pull-up
Type(2)
Typ Value (Ω)
Switchable
(1)
Switchable
(1)
Pull-down
Type
Typ Value (Ω)
Switchable
(1)
Switchable
(1)
Schmitt
Trigger(2)
Switchable
Switchable
GPIO_CLK
2
1.65–3.6V
—
Switchable
(1)
Switchable
(1)
Switchable
GPIO_ANA
3.0–3.6V
I
Switchable
(1)
—
—
Switchable
EBI
1.65–1.95V, 3.0–3.6V —
Switchable
100K
Switchable
100K
—
RSTJTAG
1.65–3.6V
—
Reset State
100K
Reset State
100K
Reset State
SYSC
1.65–3.6V
—
—
—
Reset State
15K
Reset State
USBHS
3.0–3.6V
I/O
—
—
—
—
—
CLOCK
1.65–3.6V
I/O
—
—
—
—
—
DIB
3.0–3.6V
I/O
—
—
—
—
—
Notes: 1. Refer to Section 54.2 “DC Characteristics”.
2. When “Reset State” is indicated, the configuration is defined by the “Reset State” column of the Pin Description table (see
Table 3-1 on page 10 and Table 3-2 on page 18).
Table 3-4.
I/O Type
SAMA5D3 I/O Type Assignment and Frequency
Max I/O
Frequency
(MHz)
Load (pF)
Fan-out
Drive Control
GPIO
33
40
—
High/Medium/Low
MCI_CLK
52
GPIO_CLK
66
GPIO_CLK2
75
GPIO_ANA
25
EBI
66
DDR_IO
166
RST
3
JTAG
10
SYSC
0.25
VBG
0.25
20
—
High/Medium/Low
20
—
High/Medium/Low
20
—
High/Medium/Low
20
16 mA,
40 mA (peak)
Fixed to Medium
50
—
High/Medium/Low
1.8V/3.3V
20
—
High/Medium/Low
10
—
Fixed to Low
10
—
Fixed to Medium
10
—
No
10
—
No
USBHS
480
20
—
No
CLOCK
50
50
GMAC
125
15
—
No
—
High/Medium/Low
Signal Name
All PIO lines except the lines indicated further on in
this table
MCI0CK, MCI1CK, MCI2CK
SPI0CK, SPI1CK, ETXCLK, ERXCLK
LCDDOTCK
ADx
All EBI signals
All DDR signals
NRST, NTRST, BMS
TCK, TDI, TMS, TDO
WKUP, SHDN, JTAGSEL, TST
VBG
HHSDPC, HHSDPB, HHSDPA/DHSDP,
HHSDMC, HHSDMB, HHSDMA/DHSDM
XIN, XOUT, XIN32, XOUT32
Gigabit Ethernet I/Os
26 SAMA5D3 Series [DATASHEET]
Atmel-11121F-ATARM-SAMA5D3-Series-Datasheet_02-Feb-16